Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/dev/pci - Decode the programming interface field in the ...



details:   https://anonhg.NetBSD.org/src/rev/69384f40e961
branches:  trunk
changeset: 329443:69384f40e961
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Sat May 24 15:20:32 2014 +0000

description:
- Decode the programming interface field in the Class Code register and print
  it.
- Print the cache line size in bytes.
- Print the Link Status 2 register itself.
- Some bits were not printed if the bit is 0. Always print them using with
  onoff() macro.
- Print more bits.
- KNF.
- Use macro.
- Add comments.

diffstat:

 sys/dev/pci/pci_subr.c |  485 +++++++++++++++++++++++++++++++++++-------------
 sys/dev/pci/pcireg.h   |   60 +++++-
 2 files changed, 411 insertions(+), 134 deletions(-)

diffs (truncated from 930 to 300 lines):

diff -r 71228ce37860 -r 69384f40e961 sys/dev/pci/pci_subr.c
--- a/sys/dev/pci/pci_subr.c    Sat May 24 15:09:31 2014 +0000
+++ b/sys/dev/pci/pci_subr.c    Sat May 24 15:20:32 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: pci_subr.c,v 1.116 2014/05/24 15:09:31 msaitoh Exp $   */
+/*     $NetBSD: pci_subr.c,v 1.117 2014/05/24 15:20:32 msaitoh Exp $   */
 
 /*
  * Copyright (c) 1997 Zubin D. Dittia.  All rights reserved.
@@ -40,7 +40,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.116 2014/05/24 15:09:31 msaitoh Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pci_subr.c,v 1.117 2014/05/24 15:20:32 msaitoh Exp $");
 
 #ifdef _KERNEL_OPT
 #include "opt_pci.h"
@@ -56,6 +56,7 @@
 #include <pci.h>
 #include <stdbool.h>
 #include <stdio.h>
+#include <string.h>
 #endif
 
 #include <dev/pci/pcireg.h>
@@ -75,26 +76,55 @@
        const struct pci_class *subclasses;
 };
 
+/*
+ * Class 0x00.
+ * Before rev. 2.0.
+ */
 static const struct pci_class pci_subclass_prehistoric[] = {
        { "miscellaneous",      PCI_SUBCLASS_PREHISTORIC_MISC,  NULL,   },
        { "VGA",                PCI_SUBCLASS_PREHISTORIC_VGA,   NULL,   },
        { NULL,                 0,                              NULL,   },
 };
 
+/*
+ * Class 0x01.
+ * Mass strage controller
+ */
+
+/* ATA programming interface */
+static const struct pci_class pci_interface_ata[] = {
+       { "with single DMA",    PCI_INTERFACE_ATA_SINGLEDMA,    NULL,   },
+       { "with chained DMA",   PCI_INTERFACE_ATA_CHAINEDDMA,   NULL,   },
+       { NULL,                 0,                              NULL,   },
+};
+
+/* SATA programming interface */
+static const struct pci_class pci_interface_sata[] = {
+       { "AHCI 1.0",           PCI_INTERFACE_SATA_AHCI10,      NULL,   },
+       { NULL,                 0,                              NULL,   },
+};
+
+/* Subclasses */
 static const struct pci_class pci_subclass_mass_storage[] = {
        { "SCSI",               PCI_SUBCLASS_MASS_STORAGE_SCSI, NULL,   },
        { "IDE",                PCI_SUBCLASS_MASS_STORAGE_IDE,  NULL,   },
        { "floppy",             PCI_SUBCLASS_MASS_STORAGE_FLOPPY, NULL, },
        { "IPI",                PCI_SUBCLASS_MASS_STORAGE_IPI,  NULL,   },
        { "RAID",               PCI_SUBCLASS_MASS_STORAGE_RAID, NULL,   },
-       { "ATA",                PCI_SUBCLASS_MASS_STORAGE_ATA,  NULL,   },
-       { "SATA",               PCI_SUBCLASS_MASS_STORAGE_SATA, NULL,   },
+       { "ATA",                PCI_SUBCLASS_MASS_STORAGE_ATA,
+         pci_interface_ata, },
+       { "SATA",               PCI_SUBCLASS_MASS_STORAGE_SATA,
+         pci_interface_sata, },
        { "SAS",                PCI_SUBCLASS_MASS_STORAGE_SAS,  NULL,   },
        { "NVM",                PCI_SUBCLASS_MASS_STORAGE_NVM,  NULL,   },
        { "miscellaneous",      PCI_SUBCLASS_MASS_STORAGE_MISC, NULL,   },
        { NULL,                 0,                              NULL,   },
 };
 
+/*
+ * Class 0x02.
+ * Network controller.
+ */
 static const struct pci_class pci_subclass_network[] = {
        { "ethernet",           PCI_SUBCLASS_NETWORK_ETHERNET,  NULL,   },
        { "token ring",         PCI_SUBCLASS_NETWORK_TOKENRING, NULL,   },
@@ -107,14 +137,30 @@
        { NULL,                 0,                              NULL,   },
 };
 
+/*
+ * Class 0x03.
+ * Display controller.
+ */
+
+/* VGA programming interface */
+static const struct pci_class pci_interface_vga[] = {
+       { "",                   PCI_INTERFACE_VGA_VGA,          NULL,   },
+       { "8514-compat",        PCI_INTERFACE_VGA_8514,         NULL,   },
+       { NULL,                 0,                              NULL,   },
+};
+/* Subclasses */
 static const struct pci_class pci_subclass_display[] = {
-       { "VGA",                PCI_SUBCLASS_DISPLAY_VGA,       NULL,   },
+       { "VGA",                PCI_SUBCLASS_DISPLAY_VGA,  pci_interface_vga,},
        { "XGA",                PCI_SUBCLASS_DISPLAY_XGA,       NULL,   },
        { "3D",                 PCI_SUBCLASS_DISPLAY_3D,        NULL,   },
        { "miscellaneous",      PCI_SUBCLASS_DISPLAY_MISC,      NULL,   },
        { NULL,                 0,                              NULL,   },
 };
 
+/*
+ * Class 0x04.
+ * Multimedia device.
+ */
 static const struct pci_class pci_subclass_multimedia[] = {
        { "video",              PCI_SUBCLASS_MULTIMEDIA_VIDEO,  NULL,   },
        { "audio",              PCI_SUBCLASS_MULTIMEDIA_AUDIO,  NULL,   },
@@ -124,6 +170,10 @@
        { NULL,                 0,                              NULL,   },
 };
 
+/*
+ * Class 0x05.
+ * Memory controller.
+ */
 static const struct pci_class pci_subclass_memory[] = {
        { "RAM",                PCI_SUBCLASS_MEMORY_RAM,        NULL,   },
        { "flash",              PCI_SUBCLASS_MEMORY_FLASH,      NULL,   },
@@ -131,60 +181,184 @@
        { NULL,                 0,                              NULL,   },
 };
 
+/*
+ * Class 0x06.
+ * Bridge device.
+ */
+
+/* PCI bridge programming interface */
+static const struct pci_class pci_interface_pcibridge[] = {
+       { "",                   PCI_INTERFACE_BRIDGE_PCI_PCI, NULL,     },
+       { "subtractive decode", PCI_INTERFACE_BRIDGE_PCI_SUBDEC, NULL,  },
+       { NULL,                 0,                              NULL,   },
+};
+
+/* Semi-transparent PCI-toPCI bridge programming interface */
+static const struct pci_class pci_interface_stpci[] = {
+       { "primary side facing host",   PCI_INTERFACE_STPCI_PRIMARY, NULL, },
+       { "secondary side facing host", PCI_INTERFACE_STPCI_SECONDARY, NULL, },
+       { NULL,                 0,                              NULL,   },
+};
+
+/* Subclasses */
 static const struct pci_class pci_subclass_bridge[] = {
        { "host",               PCI_SUBCLASS_BRIDGE_HOST,       NULL,   },
        { "ISA",                PCI_SUBCLASS_BRIDGE_ISA,        NULL,   },
        { "EISA",               PCI_SUBCLASS_BRIDGE_EISA,       NULL,   },
        { "MicroChannel",       PCI_SUBCLASS_BRIDGE_MC,         NULL,   },
-       { "PCI",                PCI_SUBCLASS_BRIDGE_PCI,        NULL,   },
+       { "PCI",                PCI_SUBCLASS_BRIDGE_PCI,
+         pci_interface_pcibridge,      },
        { "PCMCIA",             PCI_SUBCLASS_BRIDGE_PCMCIA,     NULL,   },
        { "NuBus",              PCI_SUBCLASS_BRIDGE_NUBUS,      NULL,   },
        { "CardBus",            PCI_SUBCLASS_BRIDGE_CARDBUS,    NULL,   },
        { "RACEway",            PCI_SUBCLASS_BRIDGE_RACEWAY,    NULL,   },
-       { "Semi-transparent PCI", PCI_SUBCLASS_BRIDGE_STPCI,    NULL,   },
+       { "Semi-transparent PCI", PCI_SUBCLASS_BRIDGE_STPCI,
+         pci_interface_stpci,  },
        { "InfiniBand",         PCI_SUBCLASS_BRIDGE_INFINIBAND, NULL,   },
        { "miscellaneous",      PCI_SUBCLASS_BRIDGE_MISC,       NULL,   },
        { NULL,                 0,                              NULL,   },
 };
 
+/*
+ * Class 0x07.
+ * Simple communications controller.
+ */
+
+/* Serial controller programming interface */
+static const struct pci_class pci_interface_serial[] = {
+       { "genric XT-compat",   PCI_INTERFACE_SERIAL_XT,        NULL,   },
+       { "16450-compat",       PCI_INTERFACE_SERIAL_16450,     NULL,   },
+       { "16550-compat",       PCI_INTERFACE_SERIAL_16550,     NULL,   },
+       { "16650-compat",       PCI_INTERFACE_SERIAL_16650,     NULL,   },
+       { "16750-compat",       PCI_INTERFACE_SERIAL_16750,     NULL,   },
+       { "16850-compat",       PCI_INTERFACE_SERIAL_16850,     NULL,   },
+       { "16950-compat",       PCI_INTERFACE_SERIAL_16950,     NULL,   },
+       { NULL,                 0,                              NULL,   },
+};
+
+/* Parallel controller programming interface */
+static const struct pci_class pci_interface_parallel[] = {
+       { "",                   PCI_INTERFACE_PARALLEL,                 NULL,},
+       { "bi-directional",     PCI_INTERFACE_PARALLEL_BIDIRECTIONAL,   NULL,},
+       { "ECP 1.X-compat",     PCI_INTERFACE_PARALLEL_ECP1X,           NULL,},
+       { "IEEE1284",           PCI_INTERFACE_PARALLEL_IEEE1284,        NULL,},
+       { "IEE1284 target",     PCI_INTERFACE_PARALLEL_IEEE1284_TGT,    NULL,},
+       { NULL,                 0,                                      NULL,},
+};
+
+/* Modem programming interface */
+static const struct pci_class pci_interface_modem[] = {
+       { "",                   PCI_INTERFACE_MODEM,                    NULL,},
+       { "Hayes&16450-compat", PCI_INTERFACE_MODEM_HAYES16450,         NULL,},
+       { "Hayes&16550-compat", PCI_INTERFACE_MODEM_HAYES16550,         NULL,},
+       { "Hayes&16650-compat", PCI_INTERFACE_MODEM_HAYES16650,         NULL,},
+       { "Hayes&16750-compat", PCI_INTERFACE_MODEM_HAYES16750,         NULL,},
+       { NULL,                 0,                                      NULL,},
+};
+
+/* Subclasses */
 static const struct pci_class pci_subclass_communications[] = {
-       { "serial",             PCI_SUBCLASS_COMMUNICATIONS_SERIAL,     NULL,},
-       { "parallel",           PCI_SUBCLASS_COMMUNICATIONS_PARALLEL,   NULL,},
+       { "serial",             PCI_SUBCLASS_COMMUNICATIONS_SERIAL,
+         pci_interface_serial, },
+       { "parallel",           PCI_SUBCLASS_COMMUNICATIONS_PARALLEL,
+         pci_interface_parallel, },
        { "multi-port serial",  PCI_SUBCLASS_COMMUNICATIONS_MPSERIAL,   NULL,},
-       { "modem",              PCI_SUBCLASS_COMMUNICATIONS_MODEM,      NULL,},
+       { "modem",              PCI_SUBCLASS_COMMUNICATIONS_MODEM,
+         pci_interface_modem, },
        { "GPIB",               PCI_SUBCLASS_COMMUNICATIONS_GPIB,       NULL,},
        { "smartcard",          PCI_SUBCLASS_COMMUNICATIONS_SMARTCARD,  NULL,},
        { "miscellaneous",      PCI_SUBCLASS_COMMUNICATIONS_MISC,       NULL,},
        { NULL,                 0,                                      NULL,},
 };
 
+/*
+ * Class 0x08.
+ * Base system peripheral.
+ */ 
+
+/* PIC programming interface */
+static const struct pci_class pci_interface_pic[] = {
+       { "genric 8259",        PCI_INTERFACE_PIC_8259,         NULL,   },
+       { "ISA PIC",            PCI_INTERFACE_PIC_ISA,          NULL,   },
+       { "EISA PIC",           PCI_INTERFACE_PIC_EISA,         NULL,   },
+       { "IO APIC",            PCI_INTERFACE_PIC_IOAPIC,       NULL,   },
+       { "IO(x) APIC",         PCI_INTERFACE_PIC_IOXAPIC,      NULL,   },
+       { NULL,                 0,                              NULL,   },
+};
+
+/* DMA programming interface */
+static const struct pci_class pci_interface_dma[] = {
+       { "genric 8237",        PCI_INTERFACE_DMA_8237,         NULL,   },
+       { "ISA",                PCI_INTERFACE_DMA_ISA,          NULL,   },
+       { "EISA",               PCI_INTERFACE_DMA_EISA,         NULL,   },
+       { NULL,                 0,                              NULL,   },
+};
+
+/* Timer programming interface */
+static const struct pci_class pci_interface_tmr[] = {
+       { "genric 8254",        PCI_INTERFACE_TIMER_8254,       NULL,   },
+       { "ISA",                PCI_INTERFACE_TIMER_ISA,        NULL,   },
+       { "EISA",               PCI_INTERFACE_TIMER_EISA,       NULL,   },
+       { NULL,                 0,                              NULL,   },
+};
+
+/* RTC programming interface */
+static const struct pci_class pci_interface_rtc[] = {
+       { "generic",            PCI_INTERFACE_RTC_GENERIC,      NULL,   },
+       { "ISA",                PCI_INTERFACE_RTC_ISA,          NULL,   },
+       { NULL,                 0,                              NULL,   },
+};
+
+/* Subclasses */
 static const struct pci_class pci_subclass_system[] = {
-       { "interrupt",          PCI_SUBCLASS_SYSTEM_PIC,        NULL,   },
-       { "8237 DMA",           PCI_SUBCLASS_SYSTEM_DMA,        NULL,   },
-       { "8254 timer",         PCI_SUBCLASS_SYSTEM_TIMER,      NULL,   },
-       { "RTC",                PCI_SUBCLASS_SYSTEM_RTC,        NULL,   },
+       { "interrupt",          PCI_SUBCLASS_SYSTEM_PIC,   pci_interface_pic,},
+       { "DMA",                PCI_SUBCLASS_SYSTEM_DMA,   pci_interface_dma,},
+       { "timer",              PCI_SUBCLASS_SYSTEM_TIMER, pci_interface_tmr,},
+       { "RTC",                PCI_SUBCLASS_SYSTEM_RTC,   pci_interface_rtc,},
        { "PCI Hot-Plug",       PCI_SUBCLASS_SYSTEM_PCIHOTPLUG, NULL,   },
        { "SD Host Controller", PCI_SUBCLASS_SYSTEM_SDHC,       NULL,   },
        { "miscellaneous",      PCI_SUBCLASS_SYSTEM_MISC,       NULL,   },
        { NULL,                 0,                              NULL,   },
 };
 
+/*
+ * Class 0x09.
+ * Input device.
+ */
+
+/* Gameport programming interface */
+static const struct pci_class pci_interface_game[] = {
+       { "generic",            PCI_INTERFACE_GAMEPORT_GENERIC, NULL,   },
+       { "legacy",             PCI_INTERFACE_GAMEPORT_LEGACY,  NULL,   },
+       { NULL,                 0,                              NULL,   },
+};
+
+/* Subclasses */
 static const struct pci_class pci_subclass_input[] = {
        { "keyboard",           PCI_SUBCLASS_INPUT_KEYBOARD,    NULL,   },
        { "digitizer",          PCI_SUBCLASS_INPUT_DIGITIZER,   NULL,   },
        { "mouse",              PCI_SUBCLASS_INPUT_MOUSE,       NULL,   },
        { "scanner",            PCI_SUBCLASS_INPUT_SCANNER,     NULL,   },
-       { "game port",          PCI_SUBCLASS_INPUT_GAMEPORT,    NULL,   },
+       { "game port",          PCI_SUBCLASS_INPUT_GAMEPORT,



Home | Main Index | Thread Index | Old Index