[src/trunk]: src/external/lgpl3/gmp/lib/libgmp/arch on mips64* use generic C ...

To: source-changes-hg%NetBSD.org@localhost
Subject: [src/trunk]: src/external/lgpl3/gmp/lib/libgmp/arch on mips64* use generic C ...
From: macallan <macallan%NetBSD.org@localhost>
Date: Tue, 31 Jul 2018 18:29:46 +0000
details:   https://anonhg.NetBSD.org/src/rev/6b0723cc712a
branches:  trunk
changeset: 329180:6b0723cc712a
user:      macallan <macallan%NetBSD.org@localhost>
date:      Tue May 13 18:46:48 2014 +0000

description:
on mips64* use generic C functions instead of assembly routines when building
n32 binaries. Should work around PR48696
ok mrg@

diffstat:

 external/lgpl3/gmp/lib/libgmp/arch/mips64eb/Makefile.inc |  49 +++++++++++++++-
 external/lgpl3/gmp/lib/libgmp/arch/mips64eb/config.h     |  16 +++++
 external/lgpl3/gmp/lib/libgmp/arch/mips64el/Makefile.inc |  31 +++++++++-
 external/lgpl3/gmp/lib/libgmp/arch/mips64el/config.h     |  18 +++++
 4 files changed, 108 insertions(+), 6 deletions(-)

diffs (260 lines):

diff -r 3e87a1fc4789 -r 6b0723cc712a external/lgpl3/gmp/lib/libgmp/arch/mips64eb/Makefile.inc
--- a/external/lgpl3/gmp/lib/libgmp/arch/mips64eb/Makefile.inc  Tue May 13 18:07:24 2014 +0000
+++ b/external/lgpl3/gmp/lib/libgmp/arch/mips64eb/Makefile.inc  Tue May 13 18:46:48 2014 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: Makefile.inc,v 1.5 2013/12/04 00:49:18 mrg Exp $
+#      $NetBSD: Makefile.inc,v 1.6 2014/05/13 18:46:48 macallan Exp $
 
 SRCS+= \
        random.c \
@@ -174,6 +174,24 @@
        sbpi1_div_r_sec.c       mpn/generic/sbpi1_div_sec.c \
        andn_n.c                mpn/generic/logops_n.c \
 
+.if (defined(CPUFLAGS) && !empty(CPUFLAGS:M-mabi=64))
+GMP_LIMB_BITS=64
+C_SRCS_LIST= \
+       xor_n.c                 mpn/generic/logops_n.c \
+       sb_div_r_sec.c          mpn/generic/sb_div_sec.c \
+       nand_n.c                mpn/generic/logops_n.c \
+       nior_n.c                mpn/generic/logops_n.c \
+       hamdist.c               mpn/generic/popham.c \
+       popcount.c              mpn/generic/popham.c \
+       sbpi1_div_qr_sec.c      mpn/generic/sbpi1_div_sec.c \
+       and_n.c                 mpn/generic/logops_n.c \
+       ior_n.c                 mpn/generic/logops_n.c \
+       sb_div_qr_sec.c         mpn/generic/sb_div_sec.c \
+       xnor_n.c                mpn/generic/logops_n.c \
+       iorn_n.c                mpn/generic/logops_n.c \
+       sbpi1_div_r_sec.c       mpn/generic/sbpi1_div_sec.c \
+       andn_n.c                mpn/generic/logops_n.c \
+
 ASM_SRCS_LIST= \
        sqr_diagonal.asm        mpn/mips64/sqr_diagonal.asm \
        add_n.asm               mpn/mips64/add_n.asm \
@@ -185,10 +203,35 @@
        addmul_1.asm            mpn/mips64/addmul_1.asm \
        sub_n.asm               mpn/mips64/sub_n.asm \
 
-.if (defined(CPUFLAGS) && !empty(CPUFLAGS:M-mabi=64))
-GMP_LIMB_BITS=64
 .else
 GMP_LIMB_BITS=32
+C_SRCS_LIST= \
+       xor_n.c                 mpn/generic/logops_n.c \
+       sb_div_r_sec.c          mpn/generic/sb_div_sec.c \
+       nand_n.c                mpn/generic/logops_n.c \
+       nior_n.c                mpn/generic/logops_n.c \
+       hamdist.c               mpn/generic/popham.c \
+       popcount.c              mpn/generic/popham.c \
+       sbpi1_div_qr_sec.c      mpn/generic/sbpi1_div_sec.c \
+       and_n.c                 mpn/generic/logops_n.c \
+       ior_n.c                 mpn/generic/logops_n.c \
+       sb_div_qr_sec.c         mpn/generic/sb_div_sec.c \
+       xnor_n.c                mpn/generic/logops_n.c \
+       iorn_n.c                mpn/generic/logops_n.c \
+       sbpi1_div_r_sec.c       mpn/generic/sbpi1_div_sec.c \
+       andn_n.c                mpn/generic/logops_n.c \
+       addn_n.c                mpn/generic/add_n.c \
+       submul_1.c              mpn/generic/submul_1.c \
+       lshift.c                mpn/generic/lshift.c \
+       mul_1.c                 mpn/generic/mul_1.c \
+       rshift.c                mpn/generic/rshift.c \
+       sub_n.c                 mpn/generic/sub_n.c \
+       addmul_1.c              mpn/generic/addmul_1.c \
+
+ASM_SRCS_LIST= 
+
 .endif
 
 COPTS+=                -Wno-error
+
+COPTS+=                -Wno-error
diff -r 3e87a1fc4789 -r 6b0723cc712a external/lgpl3/gmp/lib/libgmp/arch/mips64eb/config.h
--- a/external/lgpl3/gmp/lib/libgmp/arch/mips64eb/config.h      Tue May 13 18:07:24 2014 +0000
+++ b/external/lgpl3/gmp/lib/libgmp/arch/mips64eb/config.h      Tue May 13 18:46:48 2014 +0000
@@ -221,9 +221,13 @@
 
 /* Define to 1 each of the following for which a native (ie. CPU specific)
     implementation of the corresponding routine exists.  */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_add_n 1
+#endif
 /* #undef HAVE_NATIVE_mpn_add_n_sub_n */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_add_nc 1
+#endif
 /* #undef HAVE_NATIVE_mpn_addaddmul_1msb0 */
 /* #undef HAVE_NATIVE_mpn_addcnd_n */
 /* #undef HAVE_NATIVE_mpn_addlsh1_n */
@@ -272,7 +276,9 @@
 /* #undef HAVE_NATIVE_mpn_invert_limb */
 /* #undef HAVE_NATIVE_mpn_ior_n */
 /* #undef HAVE_NATIVE_mpn_iorn_n */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_lshift 1
+#endif
 /* #undef HAVE_NATIVE_mpn_lshiftc */
 /* #undef HAVE_NATIVE_mpn_lshsub_n */
 /* #undef HAVE_NATIVE_mpn_mod_1 */
@@ -283,7 +289,9 @@
 /* #undef HAVE_NATIVE_mpn_mod_34lsub1 */
 /* #undef HAVE_NATIVE_mpn_modexact_1_odd */
 /* #undef HAVE_NATIVE_mpn_modexact_1c_odd */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_mul_1 1
+#endif
 /* #undef HAVE_NATIVE_mpn_mul_1c */
 /* #undef HAVE_NATIVE_mpn_mul_2 */
 /* #undef HAVE_NATIVE_mpn_mul_3 */
@@ -308,12 +316,18 @@
 /* #undef HAVE_NATIVE_mpn_rsh1add_nc */
 /* #undef HAVE_NATIVE_mpn_rsh1sub_n */
 /* #undef HAVE_NATIVE_mpn_rsh1sub_nc */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_rshift 1
+#endif
 /* #undef HAVE_NATIVE_mpn_sqr_basecase */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_sqr_diagonal 1
+#endif
 /* #undef HAVE_NATIVE_mpn_sqr_diag_addlsh1 */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_sub_n 1
 #define HAVE_NATIVE_mpn_sub_nc 1
+#endif
 /* #undef HAVE_NATIVE_mpn_subcnd_n */
 /* #undef HAVE_NATIVE_mpn_sublsh1_n */
 /* #undef HAVE_NATIVE_mpn_sublsh2_n */
@@ -331,7 +345,9 @@
 /* #undef HAVE_NATIVE_mpn_tabselect */
 /* #undef HAVE_NATIVE_mpn_udiv_qrnnd */
 /* #undef HAVE_NATIVE_mpn_udiv_qrnnd_r */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_umul_ppmm 1
+#endif
 /* #undef HAVE_NATIVE_mpn_umul_ppmm_r */
 /* #undef HAVE_NATIVE_mpn_xor_n */
 /* #undef HAVE_NATIVE_mpn_xnor_n */
diff -r 3e87a1fc4789 -r 6b0723cc712a external/lgpl3/gmp/lib/libgmp/arch/mips64el/Makefile.inc
--- a/external/lgpl3/gmp/lib/libgmp/arch/mips64el/Makefile.inc  Tue May 13 18:07:24 2014 +0000
+++ b/external/lgpl3/gmp/lib/libgmp/arch/mips64el/Makefile.inc  Tue May 13 18:46:48 2014 +0000
@@ -1,4 +1,4 @@
-#      $NetBSD: Makefile.inc,v 1.5 2013/12/04 00:49:18 mrg Exp $
+#      $NetBSD: Makefile.inc,v 1.6 2014/05/13 18:46:48 macallan Exp $
 
 SRCS+= \
        random.c \
@@ -158,6 +158,8 @@
        redc_n.c \
        sub_err1_n.c \
 
+.if (defined(CPUFLAGS) && !empty(CPUFLAGS:M-mabi=64))
+GMP_LIMB_BITS=64
 C_SRCS_LIST= \
        xor_n.c                 mpn/generic/logops_n.c \
        sb_div_r_sec.c          mpn/generic/sb_div_sec.c \
@@ -185,10 +187,33 @@
        addmul_1.asm            mpn/mips64/addmul_1.asm \
        sub_n.asm               mpn/mips64/sub_n.asm \
 
-.if (defined(CPUFLAGS) && !empty(CPUFLAGS:M-mabi=64))
-GMP_LIMB_BITS=64
 .else
 GMP_LIMB_BITS=32
+C_SRCS_LIST= \
+       xor_n.c                 mpn/generic/logops_n.c \
+       sb_div_r_sec.c          mpn/generic/sb_div_sec.c \
+       nand_n.c                mpn/generic/logops_n.c \
+       nior_n.c                mpn/generic/logops_n.c \
+       hamdist.c               mpn/generic/popham.c \
+       popcount.c              mpn/generic/popham.c \
+       sbpi1_div_qr_sec.c      mpn/generic/sbpi1_div_sec.c \
+       and_n.c                 mpn/generic/logops_n.c \
+       ior_n.c                 mpn/generic/logops_n.c \
+       sb_div_qr_sec.c         mpn/generic/sb_div_sec.c \
+       xnor_n.c                mpn/generic/logops_n.c \
+       iorn_n.c                mpn/generic/logops_n.c \
+       sbpi1_div_r_sec.c       mpn/generic/sbpi1_div_sec.c \
+       andn_n.c                mpn/generic/logops_n.c \
+       addn_n.c                mpn/generic/add_n.c \
+       submul_1.c              mpn/generic/submul_1.c \
+       lshift.c                mpn/generic/lshift.c \
+       mul_1.c                 mpn/generic/mul_1.c \
+       rshift.c                mpn/generic/rshift.c \
+       sub_n.c                 mpn/generic/sub_n.c \
+       addmul_1.c              mpn/generic/addmul_1.c \
+
+ASM_SRCS_LIST= 
+
 .endif
 
 COPTS+=                -Wno-error
diff -r 3e87a1fc4789 -r 6b0723cc712a external/lgpl3/gmp/lib/libgmp/arch/mips64el/config.h
--- a/external/lgpl3/gmp/lib/libgmp/arch/mips64el/config.h      Tue May 13 18:07:24 2014 +0000
+++ b/external/lgpl3/gmp/lib/libgmp/arch/mips64el/config.h      Tue May 13 18:46:48 2014 +0000
@@ -221,9 +221,13 @@
 
 /* Define to 1 each of the following for which a native (ie. CPU specific)
     implementation of the corresponding routine exists.  */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_add_n 1
+#endif
 /* #undef HAVE_NATIVE_mpn_add_n_sub_n */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_add_nc 1
+#endif
 /* #undef HAVE_NATIVE_mpn_addaddmul_1msb0 */
 /* #undef HAVE_NATIVE_mpn_addcnd_n */
 /* #undef HAVE_NATIVE_mpn_addlsh1_n */
@@ -272,7 +276,9 @@
 /* #undef HAVE_NATIVE_mpn_invert_limb */
 /* #undef HAVE_NATIVE_mpn_ior_n */
 /* #undef HAVE_NATIVE_mpn_iorn_n */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_lshift 1
+#endif
 /* #undef HAVE_NATIVE_mpn_lshiftc */
 /* #undef HAVE_NATIVE_mpn_lshsub_n */
 /* #undef HAVE_NATIVE_mpn_mod_1 */
@@ -283,7 +289,9 @@
 /* #undef HAVE_NATIVE_mpn_mod_34lsub1 */
 /* #undef HAVE_NATIVE_mpn_modexact_1_odd */
 /* #undef HAVE_NATIVE_mpn_modexact_1c_odd */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_mul_1 1
+#endif
 /* #undef HAVE_NATIVE_mpn_mul_1c */
 /* #undef HAVE_NATIVE_mpn_mul_2 */
 /* #undef HAVE_NATIVE_mpn_mul_3 */
@@ -308,12 +316,20 @@
 /* #undef HAVE_NATIVE_mpn_rsh1add_nc */
 /* #undef HAVE_NATIVE_mpn_rsh1sub_n */
 /* #undef HAVE_NATIVE_mpn_rsh1sub_nc */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_rshift 1
+#endif
 /* #undef HAVE_NATIVE_mpn_sqr_basecase */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_sqr_diagonal 1
+#endif
 /* #undef HAVE_NATIVE_mpn_sqr_diag_addlsh1 */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_sub_n 1
+#endif
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_sub_nc 1
+#endif
 /* #undef HAVE_NATIVE_mpn_subcnd_n */
 /* #undef HAVE_NATIVE_mpn_sublsh1_n */
 /* #undef HAVE_NATIVE_mpn_sublsh2_n */
@@ -331,7 +347,9 @@
 /* #undef HAVE_NATIVE_mpn_tabselect */
 /* #undef HAVE_NATIVE_mpn_udiv_qrnnd */
 /* #undef HAVE_NATIVE_mpn_udiv_qrnnd_r */
+#ifdef _LP64
 #define HAVE_NATIVE_mpn_umul_ppmm 1
+#endif
 /* #undef HAVE_NATIVE_mpn_umul_ppmm_r */
 /* #undef HAVE_NATIVE_mpn_xor_n */
 /* #undef HAVE_NATIVE_mpn_xnor_n */
Prev by Date: [src/trunk]: src/doc mention workaround for PR48696
Next by Date: [src/trunk]: src/sys/arch/sparc64/sparc64 get_vis() now handles sun4v (VIS 1 ...
Previous by Thread: [src/trunk]: src/doc mention workaround for PR48696
Next by Thread: [src/trunk]: src/sys/arch/sparc64/sparc64 get_vis() now handles sun4v (VIS 1 ...
Indexes:
Home | Main Index | Thread Index | Old Index