[src/trunk]: src/sys/arch/evbarm/imx31 Deal with ARM_MMU_EXTENDED.

[matt <matt%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/ffaed7ac0a64
branches:  trunk
changeset: 328312:ffaed7ac0a64
user:      matt <matt%NetBSD.org@localhost>
date:      Sun Mar 30 23:12:26 2014 +0000

description:
Deal with ARM_MMU_EXTENDED.

diffstat:

 sys/arch/evbarm/imx31/imx31lk_start.S |  109 ++++++++++++---------------------
 1 files changed, 40 insertions(+), 69 deletions(-)

diffs (172 lines):

diff -r dd6812bb4758 -r ffaed7ac0a64 sys/arch/evbarm/imx31/imx31lk_start.S
--- a/sys/arch/evbarm/imx31/imx31lk_start.S     Sun Mar 30 22:39:29 2014 +0000
+++ b/sys/arch/evbarm/imx31/imx31lk_start.S     Sun Mar 30 23:12:26 2014 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: imx31lk_start.S,v 1.4 2011/01/31 06:28:03 matt Exp $   */
+/*     $NetBSD: imx31lk_start.S,v 1.5 2014/03/30 23:12:26 matt Exp $   */
 /*-
  * Copyright (c) 2011 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -32,26 +32,12 @@
 #include <arm/armreg.h>
 #include "assym.h"
 
-RCSID("$NetBSD: imx31lk_start.S,v 1.4 2011/01/31 06:28:03 matt Exp $")
-
-/*
- */
-
-#define CPWAIT_BRANCH                                                   \
-       sub     pc, pc, #4
-
-#define CPWAIT(tmp)                                                     \
-       mrc     p15, 0, tmp, c2, c0, 0  /* arbitrary read of CP15 */    ;\
-       mov     tmp, tmp                /* wait for it to complete */   ;\
-       CPWAIT_BRANCH                   /* branch to next insn */
-
+RCSID("$NetBSD: imx31lk_start.S,v 1.5 2014/03/30 23:12:26 matt Exp $")
 
 #ifndef SDRAM_START
 #define SDRAM_START 0x80000000
 #endif
 
-#define IMX31_DCACHE_SIZE 0x4000       /* 16KB L1 */
-
 /*
  * L1 == "Level One" == "first-level"
  * L2 == "Level Two" == "second-level"
@@ -61,76 +47,54 @@
 
        .global _C_LABEL(imx31lk_start)
 _C_LABEL(imx31lk_start):
-       /* Figure out where we want to jump to when the time comes */
-       adr     r8, .Lstart
-       ldr     r8, [r8]
-
-       /*
-        * set up virtual address space mapping
-        * for initial bootstrap.
-        */
-       mov     r2, #(L1_S_SIZE)                /* 1MB chunks */
+       cpsid   if, #PSR_SVC32_MODE
 
        /*
         * Firmware already mapped SDRAM VA == PA. at 0x800..
         * now map SDRAM also at VA 0x800...
         */
        mrc     p15, 0, r0, c2, c0, 0           /* L1 table addr into r0 */
-       add     r0, r0, #(0x800 * 4)            /* offset to 0x80000000 */
+#ifdef ARM_MMU_EXTENDED
+       mcr     p15, 0, r0, c2, c0, 1           /* copy it to TTBR1 */
+       mov     r3, #TTBCR_S_N_1
+       mcr     p15, 0, r3, c2, c0, 2           /* set TTBCR to enable TTBR1 */
+#endif
 
-       mov     r3, #SDRAM_START                /* map to 0x800.. */
-       orr     r3, r3, #(L1_S_AP_KRW)          /* the usual perms & stuff */
-       orr     r3, r3, #(L1_TYPE_S)
-       orr     r3, r3, #(L1_S_DOM_KERNEL)
-
-       mov     r1, #0x80                       /* 128 1MB entries */
+       mov     r1, #(KERNEL_BASE_EXT >> L1_S_SHIFT)
+       add     r2, r1, #0x80                   /* 128 1MB entries */
+       ldr     r3, .Lsdram_pde
 1:
        /* and looplooploop */
-       str     r3, [r0], #4
-       add     r3, r3, r2
-       subs    r1, r1, #1
-       bgt     1b
+       str     r3, [r0, r1, lsl #2]
+       add     r3, r3, #L1_S_SIZE
+       add     r1, r1, #1
+       cmp     r1, r2
+       blt     1b
 
        /*
         * Map an L1 section for each device to make this easy.
         */
        /* UART1 */
-       mrc     p15, 0, r0, c2, c0, 0           /* L1 table addr into r0 */
-       add     r0, r0, #(0xfd0 * 4)            /* offset to 0xfd000000 */
+       mov     r1, #0xfd0                      /* offset to 0xfd000000 */
 
-       mov     r3,     #0x43000000     
-       orr     r3, r3, #0x00f00000     
-       orr     r3, r3, #(L1_S_AP_KRW)
-       orr     r3, r3, #(L1_TYPE_S)
-       orr     r3, r3, #(L1_S_DOM_KERNEL)
-       str     r3, [r0], #4                    /* note autoinc */
+       ldr     r3, .Lio_pde
+       str     r3, [r0, r1, lsl #2]
 
        /* etc, TBD... */
 
        /*
         * Make domain control go full art.
         */
-       mov     r0, #0xffffffff
+       mov     r0, #((DOMAIN_CLIENT << (PMAP_DOMAIN_KERNEL * 2))|DOMAIN_CLIENT)
        mcr     p15, 0, r0, c3, c0, 0
 
        /*
-        * Now let's clean the cache again to make sure everything
-        * is in place.
-        *
-        * XXX: should this take into account the XScale cache clean bug?
+        * Now let's clean the cache again to make sure everything is in place.
         */
-       mov     r3, #(IMX31_DCACHE_SIZE)
-       subs    r3, r3, #32
-1:
-       mcr     p15, 0, r3, c7, c10, 2
-       subs    r3, r3, #32
-       bne     1b
-       CPWAIT(r3)
-
-       /* Drain write buffer */
-       mcr     p15, 0, r6, c7, c10, 4
+       bl      _C_LABEL(arm11x6_idcache_wbinv_all)
 
        /* Invalidate TLBs just to be sure */
+       mov     r0, #0
        mcr     p15, 0, r0, c8, c7, 0
 
        /*
@@ -138,19 +102,26 @@
         * Unspeakable cruelty and harm lurk down there. --More--
         * Are you sure you want to enter?
         */
-       adr     r8, .Lstart
-       ldr     r8, [r8]
-       mov     pc, r8                          /* So be it */
+#ifdef KERNEL_BASES_EQUAL
+       b       start
+#else
+       adr     r0, .Lstart
+       ldr     ip, [r0]
+       bx      ip
+#endif
 
 /* symbol to use for address calculation in the right VA */
+#ifndef KERNEL_BASES_EQUAL
 .Lstart:
        .word   start
+#endif
 
+#if L1_S_DOM_KERNEL
+#error kernel domain (L1_S_DOM_KERNEL) is not 0
+#endif
 
-/*
- * Calculate size of kernel to copy.  Don't bother to copy bss,
- * although I guess the CPU could use the warmup exercise ...
- */
-.Lcopy_size:
-        .word _edata - _C_LABEL(imx31lk_start)
-
+.Lsdram_pde:
+       .word   0x80000000|L1_S_AP_KRW|L1_S_C|L1_S_B|L1_TYPE_S
+.Lio_pde:
+       .word   0x43f00000|L1_S_AP_KRW|L1_TYPE_S
+END(imx31lk_start)