[src/trunk]: src/sys/arch/arm/cortex Add defines for the PL310's L2C_PREFETCH...

[reinoud <reinoud%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/50fb55b0098a
branches:  trunk
changeset: 327962:50fb55b0098a
user:      reinoud <reinoud%NetBSD.org@localhost>
date:      Sat Mar 22 16:39:20 2014 +0000

description:
Add defines for the PL310's L2C_PREFETCH_CTL and L2C_POWER_CTL registers as
per r3p2 spec.

diffstat:

 sys/arch/arm/cortex/pl310_reg.h |  17 ++++++++++++++++-
 1 files changed, 16 insertions(+), 1 deletions(-)

diffs (31 lines):

diff -r dee46cb20fb7 -r 50fb55b0098a sys/arch/arm/cortex/pl310_reg.h
--- a/sys/arch/arm/cortex/pl310_reg.h   Sat Mar 22 16:08:51 2014 +0000
+++ b/sys/arch/arm/cortex/pl310_reg.h   Sat Mar 22 16:39:20 2014 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pl310_reg.h,v 1.2 2012/09/07 11:49:00 matt Exp $ */
+/* $NetBSD: pl310_reg.h,v 1.3 2014/03/22 16:39:20 reinoud Exp $ */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -134,6 +134,21 @@
 
 #define        L2C_DEBUG_CTL           0xf40
 #define        L2C_PREFETCH_CTL        0xf60
+#define  PREFETCHCTL_DBLLINEF_EN       __BIT(30)
+#define  PREFETCHCTL_INSTRPREF_EN      __BIT(29)
+#define  PREFETCHCTL_DATAPREF_EN       __BIT(28)
+#define  PREFETCHCTL_DBLLINEF_WRAP_DA  __BIT(27)
+#define  PREFETCHCTL_PREF_DROP_EN      __BIT(24)
+#define  PREFETCHCTL_INCRDBL_LINEF_EN  __BIT(23)
+#define  PREFETCHCTL_NOSAMEID_EXCL_SEQ_EN __BIT(21)
+#define  PREFETCHCTL_PREFETCH_OFFSET_0 0
+#define  PREFETCHCTL_PREFETCH_OFFSET_7 7
+#define  PREFETCHCTL_PREFETCH_OFFSET_15        15
+#define  PREFETCHCTL_PREFETCH_OFFSET_23        23
+#define  PREFETCHCTL_PREFETCH_OFFSET_31        31
+
 #define        L2C_POWER_CTL           0xf80
+#define  POWERCTL_DYNCLKGATE   __BIT(1)
+#define  POWERCTL_STANDBY      __BIT(0)
 
 #endif /* _ARM_CORTEX_PL310_REG_H_ */