Source-Changes-HG archive
[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]
[src/trunk]: src/sys/arch/sparc64 a) make the hunt through the cpus list more...
details: https://anonhg.NetBSD.org/src/rev/6472245fa871
branches: trunk
changeset: 325523:6472245fa871
user: palle <palle%NetBSD.org@localhost>
date: Fri Dec 27 21:11:19 2013 +0000
description:
a) make the hunt through the cpus list more generic b) sun4v: ensure that the interrupt stack is mapped permanently and the TSB is setup properly - parts from OpenBSD. OK martin@
diffstat:
sys/arch/sparc64/include/pmap.h | 8 ++++-
sys/arch/sparc64/sparc64/genassym.cf | 3 +-
sys/arch/sparc64/sparc64/locore.s | 51 ++++++++++++++++++++++++++-------
sys/arch/sparc64/sparc64/pmap.c | 54 ++++++++++++++++++++++++++++++++++-
4 files changed, 101 insertions(+), 15 deletions(-)
diffs (215 lines):
diff -r 5224c4414a8e -r 6472245fa871 sys/arch/sparc64/include/pmap.h
--- a/sys/arch/sparc64/include/pmap.h Fri Dec 27 20:55:59 2013 +0000
+++ b/sys/arch/sparc64/include/pmap.h Fri Dec 27 21:11:19 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.h,v 1.56 2013/09/11 18:27:44 martin Exp $ */
+/* $NetBSD: pmap.h,v 1.57 2013/12/27 21:11:19 palle Exp $ */
/*-
* Copyright (C) 1995, 1996 Wolfgang Solfrank.
@@ -212,6 +212,12 @@
void pmap_copy_page_phys(paddr_t, paddr_t);
void pmap_zero_page_phys(paddr_t);
+#ifdef SUN4V
+/* sun4v specific */
+void pmap_setup_intstack_sun4v(paddr_t);
+void pmap_setup_tsb_sun4v(void);
+#endif
+
/* Installed physical memory, as discovered during bootstrap. */
extern int phys_installed_size;
extern struct mem_region *phys_installed;
diff -r 5224c4414a8e -r 6472245fa871 sys/arch/sparc64/sparc64/genassym.cf
--- a/sys/arch/sparc64/sparc64/genassym.cf Fri Dec 27 20:55:59 2013 +0000
+++ b/sys/arch/sparc64/sparc64/genassym.cf Fri Dec 27 21:11:19 2013 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: genassym.cf,v 1.66 2011/07/20 12:06:00 macallan Exp $
+# $NetBSD: genassym.cf,v 1.67 2013/12/27 21:11:19 palle Exp $
#
# Copyright (c) 1997 The NetBSD Foundation, Inc.
@@ -150,6 +150,7 @@
define CI_MTX_COUNT offsetof(struct cpu_info, ci_mtx_count)
define CI_SPINUP offsetof(struct cpu_info, ci_spinup)
define CI_PADDR offsetof(struct cpu_info, ci_paddr)
+define CI_CPUID offsetof(struct cpu_info, ci_cpuid)
define CI_WANT_AST offsetof(struct cpu_info, ci_want_ast)
define CI_WANT_RESCHED offsetof(struct cpu_info, ci_want_resched)
define CI_EINTSTACK offsetof(struct cpu_info, ci_eintstack)
diff -r 5224c4414a8e -r 6472245fa871 sys/arch/sparc64/sparc64/locore.s
--- a/sys/arch/sparc64/sparc64/locore.s Fri Dec 27 20:55:59 2013 +0000
+++ b/sys/arch/sparc64/sparc64/locore.s Fri Dec 27 21:11:19 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: locore.s,v 1.350 2013/12/06 21:11:06 nakayama Exp $ */
+/* $NetBSD: locore.s,v 1.351 2013/12/27 21:11:19 palle Exp $ */
/*
* Copyright (c) 2006-2010 Matthew R. Green
@@ -4041,32 +4041,41 @@
ENTRY_NOPROFILE(cpu_initialize) /* for cosmetic reasons - nicer backtrace */
+
+ /* Cache the cputyp in %l6 for later user below */
+ sethi %hi(_C_LABEL(cputyp)), %l6
+ ld [%l6 + %lo(_C_LABEL(cputyp))], %l6
+
/*
* Step 5: is no more.
*/
/*
- * Step 6: hunt through cpus list and find the one that
- * matches our UPAID.
+ * Step 6: hunt through cpus list and find the one that matches our cpuid
*/
+
+ call _C_LABEL(cpu_myid) ! Retrieve cpuid in %o0
+ mov %g0, %o0
+
sethi %hi(_C_LABEL(cpus)), %l1
- ldxa [%g0] ASI_MID_REG, %l2
LDPTR [%l1 + %lo(_C_LABEL(cpus))], %l1
- srax %l2, 17, %l2 ! Isolate UPAID from CPU reg
- and %l2, 0x1f, %l2
0:
- ld [%l1 + CI_UPAID], %l3 ! Load UPAID
- cmp %l3, %l2 ! Does it match?
+ ld [%l1 + CI_CPUID], %l3 ! Load CPUID
+ cmp %l3, %o0 ! Does it match?
bne,a,pt %icc, 0b ! no
LDPTR [%l1 + CI_NEXT], %l1 ! Load next cpu_info pointer
-
/*
* Get pointer to our cpu_info struct
*/
mov %l1, %l7 ! save cpu_info pointer
ldx [%l1 + CI_PADDR], %l1 ! Load the interrupt stack's PA
+ cmp %l6, CPU_SUN4V
+ be,pn %icc, 3f
+ nop
+
+ /* sun4u */
sethi %hi(0xa0000000), %l2 ! V=1|SZ=01|NFO=0|IE=0
sllx %l2, 32, %l2 ! Shift it into place
@@ -4087,7 +4096,14 @@
stxa %l0, [%l5] ASI_DMMU ! Make DMMU point to it
stxa %l2, [%g0] ASI_DMMU_DATA_IN ! Store it
membar #Sync
-
+
+ ba 4f
+ nop
+3:
+ /* sun4v */
+ call _C_LABEL(pmap_setup_intstack_sun4v) ! Call nice C function for mapping INTSTACK
+ mov %l1, %o0
+4:
!! Setup kernel stack (we rely on curlwp on this cpu
!! being lwp0 here and it's uarea is mapped special
!! and already accessible here)
@@ -4125,6 +4141,12 @@
/*
* install our TSB pointers
*/
+
+ cmp %l6, CPU_SUN4V
+ be,pn %icc, 5f
+ nop
+
+ /* sun4u */
sethi %hi(_C_LABEL(tsbsize)), %l2
sethi %hi(0x1fff), %l3
sethi %hi(TSB), %l4
@@ -4145,7 +4167,14 @@
set 1f, %l1
flush %l1
1:
-
+ ba 6f
+ nop
+
+5: /* sun4v */
+ call _C_LABEL(pmap_setup_tsb_sun4v)
+ nop
+
+6:
/* set trap table */
set _C_LABEL(trapbase), %l1
call _C_LABEL(prom_set_trap_table) ! Now we should be running 100% from our handlers
diff -r 5224c4414a8e -r 6472245fa871 sys/arch/sparc64/sparc64/pmap.c
--- a/sys/arch/sparc64/sparc64/pmap.c Fri Dec 27 20:55:59 2013 +0000
+++ b/sys/arch/sparc64/sparc64/pmap.c Fri Dec 27 21:11:19 2013 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: pmap.c,v 1.282 2013/12/16 20:17:35 palle Exp $ */
+/* $NetBSD: pmap.c,v 1.283 2013/12/27 21:11:20 palle Exp $ */
/*
*
* Copyright (C) 1996-1999 Eduardo Horvath.
@@ -26,7 +26,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.282 2013/12/16 20:17:35 palle Exp $");
+__KERNEL_RCSID(0, "$NetBSD: pmap.c,v 1.283 2013/12/27 21:11:20 palle Exp $");
#undef NO_VCACHE /* Don't forget the locked TLB in dostart */
#define HWREF
@@ -3780,3 +3780,53 @@
return EINVAL;
}
#endif
+
+#ifdef SUN4V
+void
+pmap_setup_intstack_sun4v(paddr_t pa)
+{
+ int64_t hv_rc;
+ int64_t data;
+ data = SUN4V_TSB_DATA(
+ 0 /* global */,
+ PGSZ_64K,
+ pa,
+ 1 /* priv */,
+ 1 /* Write */,
+ 1 /* Cacheable */,
+ FORCE_ALIAS /* ALIAS -- Disable D$ */,
+ 1 /* valid */,
+ 0 /* IE */);
+ hv_rc = hv_mmu_map_perm_addr(INTSTACK, data, MAP_DTLB);
+ if ( hv_rc != H_EOK ) {
+ panic("hv_mmu_map_perm_addr() failed - rc = %ld\n", hv_rc);
+ }
+ else {
+ memset((void *)INTSTACK, 0, 64 * KB);
+ }
+}
+
+void
+pmap_setup_tsb_sun4v(void)
+{
+ int err;
+ extern struct tsb_desc *tsb_desc;
+ extern paddr_t pmap_kextract(vaddr_t va);
+ paddr_t tsb_desc_p;
+ tsb_desc_p = pmap_kextract((vaddr_t)tsb_desc);
+ if ( !tsb_desc_p ) {
+ panic("pmap_setup_tsb_sun4v() pmap_kextract() failed");
+ }
+ err = hv_mmu_tsb_ctx0(1, tsb_desc_p);
+ if (err != H_EOK) {
+ prom_printf("hv_mmu_tsb_ctx0() err: %d\n", err);
+ panic("pmap_setup_tsb_sun4v() hv_mmu_tsb_ctx0() failed");
+ }
+ err = hv_mmu_tsb_ctxnon0(1, tsb_desc_p);
+ if (err != H_EOK) {
+ prom_printf("hv_mmu_tsb_ctxnon0() err: %d\n", err);
+ panic("pmap_setup_tsb_sun4v() hv_mmu_tsb_ctxnon0() failed");
+ }
+}
+
+#endif
Home |
Main Index |
Thread Index |
Old Index