[src/trunk]: src/sys/arch as a stop-gap, make fpuinit_mxcsr_mask() for native...

[jdolecek <jdolecek%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/daa6cbcdbfaa
branches:  trunk
changeset: 323567:daa6cbcdbfaa
user:      jdolecek <jdolecek%NetBSD.org@localhost>
date:      Wed Jun 20 20:43:20 2018 +0000

description:
as a stop-gap, make fpuinit_mxcsr_mask() for native independant of
XSAVE as it should be, only xen case checks the flag now; need to
investigate further why exactly the fault happens for the xen
no-xsave case

pointed out by maxv

diffstat:

 sys/arch/x86/include/fpu.h |  4 ++--
 sys/arch/x86/x86/cpu.c     |  6 +++---
 sys/arch/x86/x86/fpu.c     |  8 ++++----
 sys/arch/xen/x86/cpu.c     |  7 ++++---
 4 files changed, 13 insertions(+), 12 deletions(-)

diffs (104 lines):

diff -r 65a8efe422eb -r daa6cbcdbfaa sys/arch/x86/include/fpu.h
--- a/sys/arch/x86/include/fpu.h        Wed Jun 20 20:12:51 2018 +0000
+++ b/sys/arch/x86/include/fpu.h        Wed Jun 20 20:43:20 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fpu.h,v 1.10 2018/06/19 19:50:19 jdolecek Exp $        */
+/*     $NetBSD: fpu.h,v 1.11 2018/06/20 20:43:20 jdolecek Exp $        */
 
 #ifndef        _X86_FPU_H_
 #define        _X86_FPU_H_
@@ -12,7 +12,7 @@
 struct trapframe;
 
 void fpuinit(struct cpu_info *);
-void fpuinit_mxcsr_mask(uint32_t);
+void fpuinit_mxcsr_mask(bool);
 void fpusave_lwp(struct lwp *, bool);
 void fpusave_cpu(bool);
 
diff -r 65a8efe422eb -r daa6cbcdbfaa sys/arch/x86/x86/cpu.c
--- a/sys/arch/x86/x86/cpu.c    Wed Jun 20 20:12:51 2018 +0000
+++ b/sys/arch/x86/x86/cpu.c    Wed Jun 20 20:43:20 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.c,v 1.156 2018/06/19 19:50:19 jdolecek Exp $       */
+/*     $NetBSD: cpu.c,v 1.157 2018/06/20 20:43:21 jdolecek Exp $       */
 
 /*
  * Copyright (c) 2000-2012 NetBSD Foundation, Inc.
@@ -62,7 +62,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.156 2018/06/19 19:50:19 jdolecek Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.157 2018/06/20 20:43:21 jdolecek Exp $");
 
 #include "opt_ddb.h"
 #include "opt_mpbios.h"                /* for MPDEBUG */
@@ -638,7 +638,7 @@
        }
 
        if (x86_fpu_save >= FPU_SAVE_FXSAVE) {
-               fpuinit_mxcsr_mask(cr4);
+               fpuinit_mxcsr_mask(true);
        }
 
        /* If xsave is enabled, enable all fpu features */
diff -r 65a8efe422eb -r daa6cbcdbfaa sys/arch/x86/x86/fpu.c
--- a/sys/arch/x86/x86/fpu.c    Wed Jun 20 20:12:51 2018 +0000
+++ b/sys/arch/x86/x86/fpu.c    Wed Jun 20 20:43:20 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: fpu.c,v 1.40 2018/06/19 19:50:19 jdolecek Exp $        */
+/*     $NetBSD: fpu.c,v 1.41 2018/06/20 20:43:21 jdolecek Exp $        */
 
 /*
  * Copyright (c) 2008 The NetBSD Foundation, Inc.  All
@@ -96,7 +96,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.40 2018/06/19 19:50:19 jdolecek Exp $");
+__KERNEL_RCSID(0, "$NetBSD: fpu.c,v 1.41 2018/06/20 20:43:21 jdolecek Exp $");
 
 #include "opt_multiprocessor.h"
 
@@ -237,10 +237,10 @@
  * Get the value of MXCSR_MASK supported by the CPU.
  */
 void
-fpuinit_mxcsr_mask(uint32_t cr4)
+fpuinit_mxcsr_mask(bool has_fxsave)
 {
 
-       if ((cr4 & CR4_OSXSAVE) == 0) {
+       if (!has_fxsave) {
                x86_fpu_mxcsr_mask = __INITIAL_MXCSR_MASK__;
                return;
        }
diff -r 65a8efe422eb -r daa6cbcdbfaa sys/arch/xen/x86/cpu.c
--- a/sys/arch/xen/x86/cpu.c    Wed Jun 20 20:12:51 2018 +0000
+++ b/sys/arch/xen/x86/cpu.c    Wed Jun 20 20:43:20 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: cpu.c,v 1.118 2018/06/19 19:50:19 jdolecek Exp $       */
+/*     $NetBSD: cpu.c,v 1.119 2018/06/20 20:43:20 jdolecek Exp $       */
 
 /*-
  * Copyright (c) 2000 The NetBSD Foundation, Inc.
@@ -65,7 +65,7 @@
  */
 
 #include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.118 2018/06/19 19:50:19 jdolecek Exp $");
+__KERNEL_RCSID(0, "$NetBSD: cpu.c,v 1.119 2018/06/20 20:43:20 jdolecek Exp $");
 
 #include "opt_ddb.h"
 #include "opt_multiprocessor.h"
@@ -564,7 +564,8 @@
        }
 
        if (x86_fpu_save >= FPU_SAVE_FXSAVE) {
-               fpuinit_mxcsr_mask(cr4);
+               /* XXX fxsave() faults on Xen with no-xsave flag, why? */
+               fpuinit_mxcsr_mask((cr4 & CR4_OSXSAVE) != 0);
        }
 
        /*