[src/trunk]: src/sys/dev/ic Add flag for disabling store-and-forward mode, an...

[jmcneill <jmcneill%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/eab5b3770f59
branches:  trunk
changeset: 323463:eab5b3770f59
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sat Jun 16 00:15:00 2018 +0000

description:
Add flag for disabling store-and-forward mode, and a callback for notifying
bus glue that the link speed has changed.

diffstat:

 sys/dev/ic/dwc_gmac.c     |  15 +++++++++------
 sys/dev/ic/dwc_gmac_reg.h |   4 +++-
 sys/dev/ic/dwc_gmac_var.h |   6 +++++-
 3 files changed, 17 insertions(+), 8 deletions(-)

diffs (96 lines):

diff -r 0506060b0282 -r eab5b3770f59 sys/dev/ic/dwc_gmac.c
--- a/sys/dev/ic/dwc_gmac.c     Sat Jun 16 00:13:06 2018 +0000
+++ b/sys/dev/ic/dwc_gmac.c     Sat Jun 16 00:15:00 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: dwc_gmac.c,v 1.45 2017/12/21 12:09:43 martin Exp $ */
+/* $NetBSD: dwc_gmac.c,v 1.46 2018/06/16 00:15:00 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2013, 2014 The NetBSD Foundation, Inc.
@@ -41,7 +41,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: dwc_gmac.c,v 1.45 2017/12/21 12:09:43 martin Exp $");
+__KERNEL_RCSID(1, "$NetBSD: dwc_gmac.c,v 1.46 2018/06/16 00:15:00 jmcneill Exp $");
 
 /* #define     DWC_GMAC_DEBUG  1 */
 
@@ -124,7 +124,6 @@
        (AWIN_GMAC_MAC_INT_TSI | AWIN_GMAC_MAC_INT_ANEG |       \
        AWIN_GMAC_MAC_INT_LINKCHG | AWIN_GMAC_MAC_INT_RGSMII)
 
-
 #ifdef DWC_GMAC_DEBUG
 static void dwc_gmac_dump_dma(struct dwc_gmac_softc *sc);
 static void dwc_gmac_dump_tx_desc(struct dwc_gmac_softc *sc);
@@ -734,6 +733,8 @@
        case IFM_1000_T:
                break;
        }
+       if (sc->sc_set_speed)
+               sc->sc_set_speed(sc, IFM_SUBTYPE(mii->mii_media_active));
 
        flow = 0;
        if (IFM_OPTIONS(mii->mii_media_active) & IFM_FDX) {
@@ -822,9 +823,11 @@
        /*
         * Start RX/TX part
         */
-       bus_space_write_4(sc->sc_bst, sc->sc_bsh,
-           AWIN_GMAC_DMA_OPMODE, GMAC_DMA_OP_RXSTART | GMAC_DMA_OP_TXSTART |
-           GMAC_DMA_OP_RXSTOREFORWARD | GMAC_DMA_OP_TXSTOREFORWARD);
+       uint32_t opmode = GMAC_DMA_OP_RXSTART | GMAC_DMA_OP_TXSTART;
+       if ((sc->sc_flags & DWC_GMAC_FORCE_THRESH_DMA_MODE) == 0) {
+               opmode |= GMAC_DMA_OP_RXSTOREFORWARD | GMAC_DMA_OP_TXSTOREFORWARD;
+       }
+       bus_space_write_4(sc->sc_bst, sc->sc_bsh, AWIN_GMAC_DMA_OPMODE, opmode);
 
        sc->sc_stopping = false;
 
diff -r 0506060b0282 -r eab5b3770f59 sys/dev/ic/dwc_gmac_reg.h
--- a/sys/dev/ic/dwc_gmac_reg.h Sat Jun 16 00:13:06 2018 +0000
+++ b/sys/dev/ic/dwc_gmac_reg.h Sat Jun 16 00:15:00 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: dwc_gmac_reg.h,v 1.15 2015/11/21 16:04:11 martin Exp $ */
+/* $NetBSD: dwc_gmac_reg.h,v 1.16 2018/06/16 00:15:00 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2013, 2014 The NetBSD Foundation, Inc.
@@ -141,7 +141,9 @@
 #define        GMAC_DMA_OP_TXSTOREFORWARD      __BIT(21) /* start TX when a
                                                    full frame is available */
 #define        GMAC_DMA_OP_FLUSHTX             __BIT(20) /* flush TX fifo */
+#define        GMAC_DMA_OP_TTC                 __BITS(16,14) /* TX thresh control */
 #define        GMAC_DMA_OP_TXSTART             __BIT(13) /* start TX DMA engine */
+#define        GMAC_DMA_OP_RTC                 __BITS(4,3) /* RX thres control */
 #define        GMAC_DMA_OP_RXSTART             __BIT(1)  /* start RX DMA engine */
 
 #define        GMAC_DMA_INT_NIE                __BIT(16) /* Normal/Summary */
diff -r 0506060b0282 -r eab5b3770f59 sys/dev/ic/dwc_gmac_var.h
--- a/sys/dev/ic/dwc_gmac_var.h Sat Jun 16 00:13:06 2018 +0000
+++ b/sys/dev/ic/dwc_gmac_var.h Sat Jun 16 00:15:00 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: dwc_gmac_var.h,v 1.7 2017/01/21 10:30:15 skrll Exp $ */
+/* $NetBSD: dwc_gmac_var.h,v 1.8 2018/06/16 00:15:00 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2013, 2014 The NetBSD Foundation, Inc.
@@ -80,6 +80,8 @@
        bus_space_tag_t sc_bst;
        bus_space_handle_t sc_bsh;
        bus_dma_tag_t sc_dmat;
+       uint32_t sc_flags;
+#define        DWC_GMAC_FORCE_THRESH_DMA_MODE  0x01    /* force DMA to use threshold mode */
        struct ethercom sc_ec;
        struct mii_data sc_mii;
        kmutex_t sc_mdio_lock;
@@ -94,6 +96,8 @@
        kmutex_t *sc_lock;                      /* lock for softc operations */
 
        struct if_percpuq *sc_ipq;              /* softint-based input queues */
+
+       void (*sc_set_speed)(struct dwc_gmac_softc *, int);
 };
 
 void dwc_gmac_attach(struct dwc_gmac_softc*, uint32_t /*mii_clk*/);