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[src/trunk]: src/sys Rename ARM A9 Global Timer driver name to support fdt.
details: https://anonhg.NetBSD.org/src/rev/213e4e3618c1
branches: trunk
changeset: 323241:213e4e3618c1
user: hkenken <hkenken%NetBSD.org@localhost>
date: Tue Jun 05 08:03:28 2018 +0000
description:
Rename ARM A9 Global Timer driver name to support fdt.
- Rename a9tmr to arma9tmr.
- Add a9tmr_fdt.c based gtmr_fdt.c.
diffstat:
sys/arch/arm/broadcom/bcm53xx_board.c | 6 +-
sys/arch/arm/cortex/a9tmr.c | 35 ++++---
sys/arch/arm/cortex/a9tmr_var.h | 9 +-
sys/arch/arm/cortex/armperiph.c | 26 +++--
sys/arch/arm/cortex/files.cortex | 8 +-
sys/arch/arm/fdt/a9tmr_fdt.c | 129 ++++++++++++++++++++++++++++++
sys/arch/arm/fdt/files.fdt | 6 +-
sys/arch/arm/zynq/zynq7000_board.c | 6 +-
sys/arch/evbarm/amlogic/amlogic_machdep.c | 6 +-
sys/arch/evbarm/beagle/beagle_machdep.c | 6 +-
sys/arch/evbarm/conf/BCM5301X | 4 +-
sys/arch/evbarm/conf/BCM56340 | 4 +-
sys/arch/evbarm/conf/CUBOX-I | 4 +-
sys/arch/evbarm/conf/DUOVERO | 4 +-
sys/arch/evbarm/conf/GOLDENGATE | 4 +-
sys/arch/evbarm/conf/HUMMINGBOARD | 4 +-
sys/arch/evbarm/conf/NITROGEN6X | 4 +-
sys/arch/evbarm/conf/ODROID-C1 | 4 +-
sys/arch/evbarm/conf/PANDABOARD | 4 +-
sys/arch/evbarm/conf/PARALLELLA | 4 +-
sys/arch/evbarm/conf/ZEDBOARD | 4 +-
sys/arch/evbarm/gumstix/gumstix_machdep.c | 4 +-
sys/dev/DEVNAMES | 4 +-
23 files changed, 218 insertions(+), 71 deletions(-)
diffs (truncated from 709 to 300 lines):
diff -r d38cbd1d48cb -r 213e4e3618c1 sys/arch/arm/broadcom/bcm53xx_board.c
--- a/sys/arch/arm/broadcom/bcm53xx_board.c Tue Jun 05 01:25:59 2018 +0000
+++ b/sys/arch/arm/broadcom/bcm53xx_board.c Tue Jun 05 08:03:28 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bcm53xx_board.c,v 1.23 2016/10/20 09:53:07 skrll Exp $ */
+/* $NetBSD: bcm53xx_board.c,v 1.24 2018/06/05 08:03:28 hkenken Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -35,7 +35,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.23 2016/10/20 09:53:07 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: bcm53xx_board.c,v 1.24 2018/06/05 08:03:28 hkenken Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -615,7 +615,7 @@
* We need to tell the A9 Global/Watchdog Timer
* what frequency it runs at.
*/
- if (device_is_a(self, "a9tmr") || device_is_a(self, "a9wdt")) {
+ if (device_is_a(self, "arma9tmr") || device_is_a(self, "a9wdt")) {
/*
* This clock always runs at (arm_clk div 2) and only goes
* to timers that are part of the A9 MP core subsystem.
diff -r d38cbd1d48cb -r 213e4e3618c1 sys/arch/arm/cortex/a9tmr.c
--- a/sys/arch/arm/cortex/a9tmr.c Tue Jun 05 01:25:59 2018 +0000
+++ b/sys/arch/arm/cortex/a9tmr.c Tue Jun 05 08:03:28 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: a9tmr.c,v 1.14 2015/07/24 05:20:01 ryo Exp $ */
+/* $NetBSD: a9tmr.c,v 1.15 2018/06/05 08:03:28 hkenken Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
@@ -30,7 +30,7 @@
*/
#include <sys/cdefs.h>
-__KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.14 2015/07/24 05:20:01 ryo Exp $");
+__KERNEL_RCSID(0, "$NetBSD: a9tmr.c,v 1.15 2018/06/05 08:03:28 hkenken Exp $");
#include <sys/param.h>
#include <sys/bus.h>
@@ -52,8 +52,6 @@
static int a9tmr_match(device_t, cfdata_t, void *);
static void a9tmr_attach(device_t, device_t, void *);
-static int clockhandler(void *);
-
static u_int a9tmr_get_timecount(struct timecounter *);
static struct a9tmr_softc a9tmr_sc;
@@ -69,7 +67,7 @@
.tc_next = NULL,
};
-CFATTACH_DECL_NEW(a9tmr, 0, a9tmr_match, a9tmr_attach, NULL, NULL);
+CFATTACH_DECL_NEW(arma9tmr, 0, a9tmr_match, a9tmr_attach, NULL, NULL);
static inline uint32_t
a9tmr_global_read(struct a9tmr_softc *sc, bus_size_t o)
@@ -126,7 +124,10 @@
* This runs at the ARM PERIPHCLOCK which should be 1/2 of the CPU clock.
* The MD code should have setup our frequency for us.
*/
- prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq);
+ if (!prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq)) {
+ dict = device_properties(parent);
+ prop_dictionary_get_uint32(dict, "frequency", &sc->sc_freq);
+ }
humanize_number(freqbuf, sizeof(freqbuf), sc->sc_freq, "Hz", 1000);
@@ -153,12 +154,14 @@
bus_space_subregion(sc->sc_memt, sc->sc_memh,
TMR_WDOG_BASE, TMR_WDOG_SIZE, &sc->sc_wdog_memh);
- sc->sc_global_ih = intr_establish(IRQ_A9TMR_PPI_GTIMER, IPL_CLOCK,
- IST_EDGE | IST_MPSAFE, clockhandler, NULL);
- if (sc->sc_global_ih == NULL)
- panic("%s: unable to register timer interrupt", __func__);
- aprint_normal_dev(sc->sc_dev, "interrupting on irq %d\n",
- IRQ_A9TMR_PPI_GTIMER);
+ if (mpcaa->mpcaa_irq != -1) {
+ sc->sc_global_ih = intr_establish(mpcaa->mpcaa_irq, IPL_CLOCK,
+ IST_EDGE | IST_MPSAFE, a9tmr_intr, NULL);
+ if (sc->sc_global_ih == NULL)
+ panic("%s: unable to register timer interrupt", __func__);
+ aprint_normal_dev(sc->sc_dev, "interrupting on irq %d\n",
+ mpcaa->mpcaa_irq);
+ }
}
static inline uint64_t
@@ -241,7 +244,7 @@
}
void
-cpu_initclocks(void)
+a9tmr_cpu_initclocks(void)
{
struct a9tmr_softc * const sc = &a9tmr_sc;
@@ -312,12 +315,12 @@
}
/*
- * clockhandler:
+ * a9tmr_intr:
*
* Handle the hardclock interrupt.
*/
-static int
-clockhandler(void *arg)
+int
+a9tmr_intr(void *arg)
{
struct clockframe * const cf = arg;
struct a9tmr_softc * const sc = &a9tmr_sc;
diff -r d38cbd1d48cb -r 213e4e3618c1 sys/arch/arm/cortex/a9tmr_var.h
--- a/sys/arch/arm/cortex/a9tmr_var.h Tue Jun 05 01:25:59 2018 +0000
+++ b/sys/arch/arm/cortex/a9tmr_var.h Tue Jun 05 08:03:28 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: a9tmr_var.h,v 1.4 2015/01/02 21:58:03 jmcneill Exp $ */
+/* $NetBSD: a9tmr_var.h,v 1.5 2018/06/05 08:03:28 hkenken Exp $ */
/*-
* Copyright (c) 2012 The NetBSD Foundation, Inc.
* All rights reserved.
@@ -45,8 +45,15 @@
};
#ifdef _KERNEL
+#include "opt_arm_timer.h"
struct cpu_info;
void a9tmr_init_cpu_clock(struct cpu_info *);
+#ifdef __HAVE_GENERIC_CPU_INITCLOCKS
+void a9tmr_cpu_initclocks(void);
+#else
+#define a9tmr_cpu_initclocks cpu_initclocks
+#endif
+int a9tmr_intr(void *);
void a9tmr_update_freq(uint32_t);
void a9tmr_delay(unsigned int n);
#endif
diff -r d38cbd1d48cb -r 213e4e3618c1 sys/arch/arm/cortex/armperiph.c
--- a/sys/arch/arm/cortex/armperiph.c Tue Jun 05 01:25:59 2018 +0000
+++ b/sys/arch/arm/cortex/armperiph.c Tue Jun 05 08:03:28 2018 +0000
@@ -31,7 +31,7 @@
#include <sys/cdefs.h>
-__KERNEL_RCSID(1, "$NetBSD: armperiph.c,v 1.12 2017/12/29 11:06:26 skrll Exp $");
+__KERNEL_RCSID(1, "$NetBSD: armperiph.c,v 1.13 2018/06/05 08:03:28 hkenken Exp $");
#include <sys/param.h>
#include <sys/device.h>
@@ -62,11 +62,11 @@
#ifdef CPU_CORTEXA5
static const struct armperiph_info a5_devices[] = {
- { "armscu", 0x0000, 0 },
- { "armgic", 0x1000, 0x0100 },
- { "a9tmr", 0x0200, 0 },
- { "a9wdt", 0x0600, 0 },
- { "arml2cc", 0, 0 }, /* external; needs "offset" property */
+ { "armscu", 0x0000, 0 },
+ { "armgic", 0x1000, 0x0100 },
+ { "arma9tmr", 0x0200, 0 },
+ { "a9wdt", 0x0600, 0 },
+ { "arml2cc", 0, 0 }, /* external; needs "offset" property */
{ "", 0, 0 },
};
#endif
@@ -81,11 +81,11 @@
#ifdef CPU_CORTEXA9
static const struct armperiph_info a9_devices[] = {
- { "armscu", 0x0000, 0 },
- { "arml2cc", 0x2000, 0 },
- { "armgic", 0x1000, 0x0100 },
- { "a9tmr", 0x0200, 0 },
- { "a9wdt", 0x0600, 0 },
+ { "armscu", 0x0000, 0 },
+ { "arml2cc", 0x2000, 0 },
+ { "armgic", 0x1000, 0x0100 },
+ { "arma9tmr", 0x0200, 0 },
+ { "a9wdt", 0x0600, 0 },
{ "", 0, 0 },
};
#endif
@@ -229,6 +229,10 @@
.mpcaa_off1 = cfg->cfg_devices[i].pi_off1,
.mpcaa_off2 = cfg->cfg_devices[i].pi_off2,
};
+#if defined(CPU_CORTEXA9)
+ if (strcmp(mpcaa.mpcaa_name, "arma9tmr") == 0)
+ mpcaa.mpcaa_irq = IRQ_A9TMR_PPI_GTIMER;
+#endif
#if defined(CPU_CORTEXA7) || defined(CPU_CORTEXA15) || defined(CPU_CORTEXA57)
if (strcmp(mpcaa.mpcaa_name, "armgtmr") == 0) {
mpcaa.mpcaa_irq = IRQ_GTMR_PPI_VTIMER;
diff -r d38cbd1d48cb -r 213e4e3618c1 sys/arch/arm/cortex/files.cortex
--- a/sys/arch/arm/cortex/files.cortex Tue Jun 05 01:25:59 2018 +0000
+++ b/sys/arch/arm/cortex/files.cortex Tue Jun 05 08:03:28 2018 +0000
@@ -1,4 +1,4 @@
-# $NetBSD: files.cortex,v 1.6 2017/05/28 00:32:46 jmcneill Exp $
+# $NetBSD: files.cortex,v 1.7 2018/06/05 08:03:28 hkenken Exp $
defflag opt_cpu_in_cksum.h NEON_IN_CKSUM
@@ -27,9 +27,9 @@
file arch/arm/cortex/gtmr.c armgtmr
# A9 MPCore Global Timer
-device a9tmr
-attach a9tmr at mpcorebus
-file arch/arm/cortex/a9tmr.c a9tmr
+device arma9tmr
+attach arma9tmr at mpcorebus
+file arch/arm/cortex/a9tmr.c arma9tmr
# A9 MPcore Watchdog Timer
device a9wdt: sysmon_wdog
diff -r d38cbd1d48cb -r 213e4e3618c1 sys/arch/arm/fdt/a9tmr_fdt.c
--- /dev/null Thu Jan 01 00:00:00 1970 +0000
+++ b/sys/arch/arm/fdt/a9tmr_fdt.c Tue Jun 05 08:03:28 2018 +0000
@@ -0,0 +1,129 @@
+/* $NetBSD: a9tmr_fdt.c,v 1.1 2018/06/05 08:03:28 hkenken Exp $ */
+
+/*-
+ * Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ * notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ * notice, this list of conditions and the following disclaimer in the
+ * documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__KERNEL_RCSID(0, "$NetBSD: a9tmr_fdt.c,v 1.1 2018/06/05 08:03:28 hkenken Exp $");
+
+#include <sys/param.h>
+#include <sys/bus.h>
+#include <sys/device.h>
+#include <sys/intr.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/kmem.h>
+
+#include <arm/cortex/a9tmr_intr.h>
+#include <arm/cortex/mpcore_var.h>
+#include <arm/cortex/a9tmr_var.h>
+
+#include <dev/fdt/fdtvar.h>
+#include <arm/fdt/arm_fdtvar.h>
+
+static int a9tmr_fdt_match(device_t, cfdata_t, void *);
+static void a9tmr_fdt_attach(device_t, device_t, void *);
+
+static void a9tmr_fdt_cpu_hatch(void *, struct cpu_info *);
+
+CFATTACH_DECL_NEW(a9tmr_fdt, 0, a9tmr_fdt_match, a9tmr_fdt_attach, NULL, NULL);
+
+static int
+a9tmr_fdt_match(device_t parent, cfdata_t cf, void *aux)
+{
+ const char * const compatible[] = {
+ "arm,cortex-a9-global-timer",
+ NULL
+ };
+ struct fdt_attach_args * const faa = aux;
+
+ return of_compatible(faa->faa_phandle, compatible) >= 0;
+}
+
+static void
+a9tmr_fdt_attach(device_t parent, device_t self, void *aux)
+{
+ struct fdt_attach_args * const faa = aux;
+ const int phandle = faa->faa_phandle;
+ bus_space_handle_t bsh;
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