[src/trunk]: src/sys/arch/arm/cortex keep stack pointer even if chainging CPU...

[ryo <ryo%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/061df9501e32
branches:  trunk
changeset: 320227:061df9501e32
user:      ryo <ryo%NetBSD.org@localhost>
date:      Wed Jun 27 11:05:50 2018 +0000

description:
keep stack pointer even if chainging CPU mode.

diffstat:

 sys/arch/arm/cortex/a9_mpsubr.S |  5 ++++-
 1 files changed, 4 insertions(+), 1 deletions(-)

diffs (26 lines):

diff -r df49b1d2f5a7 -r 061df9501e32 sys/arch/arm/cortex/a9_mpsubr.S
--- a/sys/arch/arm/cortex/a9_mpsubr.S   Wed Jun 27 11:05:38 2018 +0000
+++ b/sys/arch/arm/cortex/a9_mpsubr.S   Wed Jun 27 11:05:50 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: a9_mpsubr.S,v 1.55 2018/01/18 12:49:09 skrll Exp $     */
+/*     $NetBSD: a9_mpsubr.S,v 1.56 2018/06/27 11:05:50 ryo Exp $       */
 /*-
  * Copyright (c) 2012 The NetBSD Foundation, Inc.
  * All rights reserved.
@@ -351,6 +351,7 @@
 //
 cortex_init:
        mov     r10, lr                         // save lr
+       mov     r9, sp                          // save sp
 
 #if defined(CPU_CORTEXVIRT)
        /* Leave HYP mode and move into supervisor mode with IRQs/FIQs disabled. */
@@ -380,6 +381,8 @@
        mov     r0, #0
        msr     spsr_sxc, r0                    // set SPSR[23:8] to known value
 
+       mov     sp, r9                          // restore sp
+
 #if 0
        mrc     p14, 0, r0, c0, c0, 0           // MIDR read
        ufbx    r0, r0, #4, #4                  // extract cortex part.