[src/trunk]: src/sys/arch/x86/include Fix the bit location of SSBD in the mac...

[msaitoh <msaitoh%NetBSD.org@localhost>]

details:   https://anonhg.NetBSD.org/src/rev/c3c1c4787d8f
branches:  trunk
changeset: 319463:c3c1c4787d8f
user:      msaitoh <msaitoh%NetBSD.org@localhost>
date:      Thu May 31 03:29:01 2018 +0000

description:
Fix the bit location of SSBD in the macro for snprintb.

diffstat:

 sys/arch/x86/include/specialreg.h |  9 +++++----
 1 files changed, 5 insertions(+), 4 deletions(-)

diffs (23 lines):

diff -r 51ff547740fd -r c3c1c4787d8f sys/arch/x86/include/specialreg.h
--- a/sys/arch/x86/include/specialreg.h Thu May 31 02:50:37 2018 +0000
+++ b/sys/arch/x86/include/specialreg.h Thu May 31 03:29:01 2018 +0000
@@ -1,4 +1,4 @@
-/*     $NetBSD: specialreg.h,v 1.125 2018/05/23 07:24:37 maxv Exp $    */
+/*     $NetBSD: specialreg.h,v 1.126 2018/05/31 03:29:01 msaitoh Exp $ */
 
 /*-
  * Copyright (c) 1991 The Regents of the University of California.
@@ -405,9 +405,10 @@
 #define CPUID_SEF_ARCH_CAP     __BIT(29) /* IA32_ARCH_CAPABILITIES */
 #define CPUID_SEF_SSBD         __BIT(31) /* Speculative Store Bypass Disable */
 
-#define CPUID_SEF_FLAGS2       \
-       "\20" "\3" "AVX512_4VNNIW" "\4" "AVX512_4FMAPS" \
-       "\33" "IBRS" "\34" "STIBP" "\36" "ARCH_CAP" "\38" "SSBD"
+#define CPUID_SEF_FLAGS2       "\20" \
+                               "\3" "AVX512_4VNNIW" "\4" "AVX512_4FMAPS" \
+                                       "\33" "IBRS"    "\34" "STIBP"   \
+                       "\36" "ARCH_CAP"                "\40" "SSBD"
 
 /*
  * CPUID Processor extended state Enumeration Fn0000000d