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[src/trunk]: src/sys/arch/arm/sunxi Set SUNXI_CCU_NM_DIVIDE_BY_T...



details:   https://anonhg.NetBSD.org/src/rev/f9324a2953ff
branches:  trunk
changeset: 319126:f9324a2953ff
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Fri May 18 02:03:00 2018 +0000

description:
Set SUNXI_CCU_NM_DIVIDE_BY_TWO on mmc module clocks. There is an
undocumented post divider between the clock and mmc module.

diffstat:

 sys/arch/arm/sunxi/sun50i_a64_ccu.c |  10 +++++-----
 1 files changed, 5 insertions(+), 5 deletions(-)

diffs (43 lines):

diff -r f3107a530200 -r f9324a2953ff sys/arch/arm/sunxi/sun50i_a64_ccu.c
--- a/sys/arch/arm/sunxi/sun50i_a64_ccu.c       Fri May 18 01:52:58 2018 +0000
+++ b/sys/arch/arm/sunxi/sun50i_a64_ccu.c       Fri May 18 02:03:00 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: sun50i_a64_ccu.c,v 1.8 2018/05/18 01:52:58 jmcneill Exp $ */
+/* $NetBSD: sun50i_a64_ccu.c,v 1.9 2018/05/18 02:03:00 jmcneill Exp $ */
 
 /*-
  * Copyright (c) 2017 Jared McNeill <jmcneill%invisible.ca@localhost>
@@ -28,7 +28,7 @@
 
 #include <sys/cdefs.h>
 
-__KERNEL_RCSID(1, "$NetBSD: sun50i_a64_ccu.c,v 1.8 2018/05/18 01:52:58 jmcneill Exp $");
+__KERNEL_RCSID(1, "$NetBSD: sun50i_a64_ccu.c,v 1.9 2018/05/18 02:03:00 jmcneill Exp $");
 
 #include <sys/param.h>
 #include <sys/bus.h>
@@ -295,21 +295,21 @@
            __BITS(3,0),        /* m */
            __BITS(25,24),      /* sel */
            __BIT(31),          /* enable */
-           SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
+           SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN|SUNXI_CCU_NM_DIVIDE_BY_TWO),
        SUNXI_CCU_NM(A64_CLK_MMC1, "mmc1", mmc_parents,
            SDMMC1_CLK_REG,     /* reg */
            __BITS(17,16),      /* n */
            __BITS(3,0),        /* m */
            __BITS(25,24),      /* sel */
            __BIT(31),          /* enable */
-           SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
+           SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN|SUNXI_CCU_NM_DIVIDE_BY_TWO),
        SUNXI_CCU_NM(A64_CLK_MMC2, "mmc2", mmc_parents,
            SDMMC2_CLK_REG,     /* reg */
            __BITS(17,16),      /* n */
            __BITS(3,0),        /* m */
            __BITS(25,24),      /* sel */
            __BIT(31),          /* enable */
-           SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN),
+           SUNXI_CCU_NM_POWER_OF_TWO|SUNXI_CCU_NM_ROUND_DOWN|SUNXI_CCU_NM_DIVIDE_BY_TWO),
 
        SUNXI_CCU_DIV_GATE(A64_CLK_THS, "ths", ths_parents,
            THS_CLK_REG,        /* reg */



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