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[src/trunk]: src/sys/dev sync with openbsd bwfm to some extent.
details: https://anonhg.NetBSD.org/src/rev/f83464c086ae
branches: trunk
changeset: 318967:f83464c086ae
user: maya <maya%NetBSD.org@localhost>
date: Fri May 11 07:41:11 2018 +0000
description:
sync with openbsd bwfm to some extent.
add a txcheck
set chip active/passive for more kinds of chips
add wrapper around setting active/passive
detect chip RAM
make bwfm_rx take an mbuf
diffstat:
sys/dev/ic/bwfm.c | 334 ++++++++++++++++++++++++++++++++++++------
sys/dev/ic/bwfmreg.h | 109 +++++++++++++-
sys/dev/ic/bwfmvar.h | 19 ++-
sys/dev/sdmmc/if_bwfm_sdio.c | 13 +-
sys/dev/usb/if_bwfm_usb.c | 53 ++++++-
5 files changed, 471 insertions(+), 57 deletions(-)
diffs (truncated from 846 to 300 lines):
diff -r 036aa246cd28 -r f83464c086ae sys/dev/ic/bwfm.c
--- a/sys/dev/ic/bwfm.c Fri May 11 00:00:17 2018 +0000
+++ b/sys/dev/ic/bwfm.c Fri May 11 07:41:11 2018 +0000
@@ -1,4 +1,4 @@
-/* $NetBSD: bwfm.c,v 1.10 2018/01/16 18:42:43 maxv Exp $ */
+/* $NetBSD: bwfm.c,v 1.11 2018/05/11 07:41:11 maya Exp $ */
/* $OpenBSD: bwfm.c,v 1.5 2017/10/16 22:27:16 patrick Exp $ */
/*
* Copyright (c) 2010-2016 Broadcom Corporation
@@ -21,7 +21,6 @@
#include <sys/systm.h>
#include <sys/buf.h>
#include <sys/kernel.h>
-#include <sys/malloc.h>
#include <sys/device.h>
#include <sys/queue.h>
#include <sys/socket.h>
@@ -85,9 +84,16 @@
void bwfm_chip_dmp_erom_scan(struct bwfm_softc *);
int bwfm_chip_dmp_get_regaddr(struct bwfm_softc *, uint32_t *,
uint32_t *, uint32_t *);
+int bwfm_chip_cr4_set_active(struct bwfm_softc *, const uint32_t);
void bwfm_chip_cr4_set_passive(struct bwfm_softc *);
+int bwfm_chip_ca7_set_active(struct bwfm_softc *, const uint32_t);
void bwfm_chip_ca7_set_passive(struct bwfm_softc *);
+int bwfm_chip_cm3_set_active(struct bwfm_softc *);
void bwfm_chip_cm3_set_passive(struct bwfm_softc *);
+void bwfm_chip_socram_ramsize(struct bwfm_softc *, struct bwfm_core *);
+void bwfm_chip_sysmem_ramsize(struct bwfm_softc *, struct bwfm_core *);
+void bwfm_chip_tcm_ramsize(struct bwfm_softc *, struct bwfm_core *);
+void bwfm_chip_tcm_rambase(struct bwfm_softc *);
int bwfm_proto_bcdc_query_dcmd(struct bwfm_softc *, int,
int, char *, size_t *);
@@ -107,7 +113,7 @@
void bwfm_scan(struct bwfm_softc *);
void bwfm_connect(struct bwfm_softc *);
-void bwfm_rx(struct bwfm_softc *, char *, size_t);
+void bwfm_rx(struct bwfm_softc *, struct mbuf *);
void bwfm_rx_event(struct bwfm_softc *, char *, size_t);
void bwfm_scan_node(struct bwfm_softc *, struct bwfm_bss_info *, size_t);
@@ -133,7 +139,7 @@
char fw_version[BWFM_DCMD_SMLEN];
uint32_t bandlist[3];
uint32_t tmp;
- int i, error;
+ int i, j, error;
error = workqueue_create(&sc->sc_taskq, DEVNAME(sc),
bwfm_task, sc, PRI_NONE, IPL_NET, 0);
@@ -203,8 +209,8 @@
ic->ic_sup_rates[IEEE80211_MODE_11B] = ieee80211_std_rateset_11b;
ic->ic_sup_rates[IEEE80211_MODE_11G] = ieee80211_std_rateset_11g;
- for (i = 0; i < __arraycount(bwfm_2ghz_channels); i++) {
- uint8_t chan = bwfm_2ghz_channels[i];
+ for (j = 0; j < __arraycount(bwfm_2ghz_channels); j++) {
+ uint8_t chan = bwfm_2ghz_channels[j];
ic->ic_channels[chan].ic_freq =
ieee80211_ieee2mhz(chan, IEEE80211_CHAN_2GHZ);
ic->ic_channels[chan].ic_flags =
@@ -215,8 +221,8 @@
case BWFM_BAND_5G:
ic->ic_sup_rates[IEEE80211_MODE_11A] = ieee80211_std_rateset_11a;
- for (i = 0; i < __arraycount(bwfm_5ghz_channels); i++) {
- uint8_t chan = bwfm_5ghz_channels[i];
+ for (j = 0; j < __arraycount(bwfm_5ghz_channels); j++) {
+ uint8_t chan = bwfm_5ghz_channels[j];
ic->ic_channels[chan].ic_freq =
ieee80211_ieee2mhz(chan, IEEE80211_CHAN_5GHZ);
ic->ic_channels[chan].ic_flags =
@@ -307,6 +313,11 @@
continue;
}
+ if (sc->sc_bus_ops->bs_txcheck(sc)) {
+ ifp->if_flags |= IFF_OACTIVE;
+ break;
+ }
+
IFQ_DEQUEUE(&ifp->if_snd, m);
if (m == NULL)
break;
@@ -848,24 +859,22 @@
return 1;
}
- if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4) != NULL)
- bwfm_chip_cr4_set_passive(sc);
- if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7) != NULL)
- bwfm_chip_ca7_set_passive(sc);
- if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CM3) != NULL)
- bwfm_chip_cm3_set_passive(sc);
+ bwfm_chip_set_passive(sc);
if (sc->sc_buscore_ops->bc_reset) {
sc->sc_buscore_ops->bc_reset(sc);
- if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4) != NULL)
- bwfm_chip_cr4_set_passive(sc);
- if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7) != NULL)
- bwfm_chip_ca7_set_passive(sc);
- if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CM3) != NULL)
- bwfm_chip_cm3_set_passive(sc);
+ bwfm_chip_set_passive(sc);
}
- /* TODO: get raminfo */
+ if ((core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4)) != NULL) {
+ bwfm_chip_tcm_ramsize(sc, core);
+ bwfm_chip_tcm_rambase(sc);
+ } else if ((core = bwfm_chip_get_core(sc, BWFM_AGENT_SYS_MEM)) != NULL) {
+ bwfm_chip_sysmem_ramsize(sc, core);
+ bwfm_chip_tcm_rambase(sc);
+ } else if ((core = bwfm_chip_get_core(sc, BWFM_AGENT_INTERNAL_MEM)) != NULL) {
+ bwfm_chip_socram_ramsize(sc, core);
+ }
core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_CHIPCOMMON);
sc->sc_chip.ch_cc_caps = sc->sc_buscore_ops->bc_read(sc,
@@ -1117,16 +1126,116 @@
}
/* Core configuration */
+int
+bwfm_chip_set_active(struct bwfm_softc *sc, const uint32_t rstvec)
+{
+ if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4) != NULL)
+ return bwfm_chip_cr4_set_active(sc, rstvec);
+ if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7) != NULL)
+ return bwfm_chip_ca7_set_active(sc, rstvec);
+ if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CM3) != NULL)
+ return bwfm_chip_cm3_set_active(sc);
+ return 1;
+}
+
+void
+bwfm_chip_set_passive(struct bwfm_softc *sc)
+{
+ if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4) != NULL) {
+ bwfm_chip_cr4_set_passive(sc);
+ return;
+ }
+ if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7) != NULL) {
+ bwfm_chip_ca7_set_passive(sc);
+ return;
+ }
+ if (bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CM3) != NULL) {
+ bwfm_chip_cm3_set_passive(sc);
+ return;
+ }
+}
+
+int
+bwfm_chip_cr4_set_active(struct bwfm_softc *sc, const uint32_t rstvec)
+{
+ struct bwfm_core *core;
+
+ sc->sc_buscore_ops->bc_activate(sc, rstvec);
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4);
+ sc->sc_chip.ch_core_reset(sc, core,
+ BWFM_AGENT_IOCTL_ARMCR4_CPUHALT, 0, 0);
+
+ return 0;
+}
+
void
bwfm_chip_cr4_set_passive(struct bwfm_softc *sc)
{
- panic("%s: CR4 not supported", DEVNAME(sc));
+ struct bwfm_core *core;
+ uint32_t val;
+
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CR4);
+ val = sc->sc_buscore_ops->bc_read(sc,
+ core->co_wrapbase + BWFM_AGENT_IOCTL);
+ sc->sc_chip.ch_core_reset(sc, core,
+ val & BWFM_AGENT_IOCTL_ARMCR4_CPUHALT,
+ BWFM_AGENT_IOCTL_ARMCR4_CPUHALT,
+ BWFM_AGENT_IOCTL_ARMCR4_CPUHALT);
+
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_80211);
+ sc->sc_chip.ch_core_reset(sc, core, BWFM_AGENT_D11_IOCTL_PHYRESET |
+ BWFM_AGENT_D11_IOCTL_PHYCLOCKEN, BWFM_AGENT_D11_IOCTL_PHYCLOCKEN,
+ BWFM_AGENT_D11_IOCTL_PHYCLOCKEN);
+}
+
+int
+bwfm_chip_ca7_set_active(struct bwfm_softc *sc, const uint32_t rstvec)
+{
+ struct bwfm_core *core;
+
+ sc->sc_buscore_ops->bc_activate(sc, rstvec);
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7);
+ sc->sc_chip.ch_core_reset(sc, core,
+ BWFM_AGENT_IOCTL_ARMCR4_CPUHALT, 0, 0);
+
+ return 0;
}
void
bwfm_chip_ca7_set_passive(struct bwfm_softc *sc)
{
- panic("%s: CA7 not supported", DEVNAME(sc));
+ struct bwfm_core *core;
+ uint32_t val;
+
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CA7);
+ val = sc->sc_buscore_ops->bc_read(sc,
+ core->co_wrapbase + BWFM_AGENT_IOCTL);
+ sc->sc_chip.ch_core_reset(sc, core,
+ val & BWFM_AGENT_IOCTL_ARMCR4_CPUHALT,
+ BWFM_AGENT_IOCTL_ARMCR4_CPUHALT,
+ BWFM_AGENT_IOCTL_ARMCR4_CPUHALT);
+
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_80211);
+ sc->sc_chip.ch_core_reset(sc, core, BWFM_AGENT_D11_IOCTL_PHYRESET |
+ BWFM_AGENT_D11_IOCTL_PHYCLOCKEN, BWFM_AGENT_D11_IOCTL_PHYCLOCKEN,
+ BWFM_AGENT_D11_IOCTL_PHYCLOCKEN);
+}
+
+int
+bwfm_chip_cm3_set_active(struct bwfm_softc *sc)
+{
+ struct bwfm_core *core;
+
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_INTERNAL_MEM);
+ if (!sc->sc_chip.ch_core_isup(sc, core))
+ return 1;
+
+ sc->sc_buscore_ops->bc_activate(sc, 0);
+
+ core = bwfm_chip_get_core(sc, BWFM_AGENT_CORE_ARM_CM3);
+ sc->sc_chip.ch_core_reset(sc, core, 0, 0, 0);
+
+ return 0;
}
void
@@ -1151,6 +1260,153 @@
}
}
+/* RAM size helpers */
+void
+bwfm_chip_socram_ramsize(struct bwfm_softc *sc, struct bwfm_core *core)
+{
+ uint32_t coreinfo, nb, lss, banksize, bankinfo;
+ uint32_t ramsize = 0, srsize = 0;
+ int i;
+
+ if (!sc->sc_chip.ch_core_isup(sc, core))
+ sc->sc_chip.ch_core_reset(sc, core, 0, 0, 0);
+
+ coreinfo = sc->sc_buscore_ops->bc_read(sc,
+ core->co_base + BWFM_SOCRAM_COREINFO);
+ nb = (coreinfo & BWFM_SOCRAM_COREINFO_SRNB_MASK)
+ >> BWFM_SOCRAM_COREINFO_SRNB_SHIFT;
+
+ if (core->co_rev <= 7 || core->co_rev == 12) {
+ banksize = coreinfo & BWFM_SOCRAM_COREINFO_SRBSZ_MASK;
+ lss = (coreinfo & BWFM_SOCRAM_COREINFO_LSS_MASK)
+ >> BWFM_SOCRAM_COREINFO_LSS_SHIFT;
+ if (lss != 0)
+ nb--;
+ ramsize = nb * (1 << (banksize + BWFM_SOCRAM_COREINFO_SRBSZ_BASE));
+ if (lss != 0)
+ ramsize += (1 << ((lss - 1) + BWFM_SOCRAM_COREINFO_SRBSZ_BASE));
+ } else {
+ for (i = 0; i < nb; i++) {
+ sc->sc_buscore_ops->bc_write(sc,
+ core->co_base + BWFM_SOCRAM_BANKIDX,
+ (BWFM_SOCRAM_BANKIDX_MEMTYPE_RAM <<
+ BWFM_SOCRAM_BANKIDX_MEMTYPE_SHIFT) | i);
+ bankinfo = sc->sc_buscore_ops->bc_read(sc,
+ core->co_base + BWFM_SOCRAM_BANKINFO);
+ banksize = ((bankinfo & BWFM_SOCRAM_BANKINFO_SZMASK) + 1)
+ * BWFM_SOCRAM_BANKINFO_SZBASE;
+ ramsize += banksize;
+ if (bankinfo & BWFM_SOCRAM_BANKINFO_RETNTRAM_MASK)
+ srsize += banksize;
+ }
+ }
+
+ switch (sc->sc_chip.ch_chip) {
+ case BRCM_CC_4334_CHIP_ID:
+ if (sc->sc_chip.ch_chiprev < 2)
+ srsize = 32 * 1024;
+ break;
+ case BRCM_CC_43430_CHIP_ID:
+ srsize = 64 * 1024;
+ break;
+ default:
+ break;
+ }
+
+ sc->sc_chip.ch_ramsize = ramsize;
+ sc->sc_chip.ch_srsize = srsize;
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