Source-Changes-HG archive

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index][Old Index]

[src/trunk]: src/sys/external/gpl2/dts/dist merge conflicts



details:   https://anonhg.NetBSD.org/src/rev/364350e2dc78
branches:  trunk
changeset: 318545:364350e2dc78
user:      jmcneill <jmcneill%NetBSD.org@localhost>
date:      Sat Apr 28 18:28:25 2018 +0000
description:
merge conflicts

diffstat:

 sys/external/gpl2/dts/dist/arch/arm/boot/dts/bcm2835-rpi.dtsi                   |   10 +-
 sys/external/gpl2/dts/dist/arch/arm/boot/dts/bcm283x.dtsi                       |   24 +-
 sys/external/gpl2/dts/dist/arch/arm/boot/dts/cloudengines-pogoplug-series-3.dts |   94 --
 sys/external/gpl2/dts/dist/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi       |   99 --
 sys/external/gpl2/dts/dist/arch/arm/boot/dts/imx6qdl-microsom.dtsi              |  161 ---
 sys/external/gpl2/dts/dist/arch/arm/boot/dts/imx7d-pico.dts                     |  442 ---------
 sys/external/gpl2/dts/dist/arch/arm/boot/dts/samsung_k3pe0e000b.dtsi            |   68 -
 sys/external/gpl2/dts/dist/arch/arm/boot/dts/wd-mbwe.dts                        |  112 --
 sys/external/gpl2/dts/dist/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi |  443 ----------
 sys/external/gpl2/dts/dist/arch/arm64/boot/dts/marvell/armada-cp110-slave.dtsi  |  441 ---------
 sys/external/gpl2/dts/dist/include/dt-bindings/input/linux-event-codes.h        |    3 +-
 11 files changed, 31 insertions(+), 1866 deletions(-)

diffs (truncated from 2022 to 300 lines):

diff -r 178e6dafe74d -r 364350e2dc78 sys/external/gpl2/dts/dist/arch/arm/boot/dts/bcm2835-rpi.dtsi
--- a/sys/external/gpl2/dts/dist/arch/arm/boot/dts/bcm2835-rpi.dtsi     Sat Apr 28 18:26:53 2018 +0000
+++ b/sys/external/gpl2/dts/dist/arch/arm/boot/dts/bcm2835-rpi.dtsi     Sat Apr 28 18:28:25 2018 +0000
@@ -18,7 +18,9 @@
 
        soc {
                firmware: firmware {
-                       compatible = "raspberrypi,bcm2835-firmware";
+                       compatible = "raspberrypi,bcm2835-firmware", "simple-bus";
+                       #address-cells = <0>;
+                       #size-cells = <0>;
                        mboxes = <&mailbox>;
                };
 
@@ -27,6 +29,12 @@
                        firmware = <&firmware>;
                        #power-domain-cells = <1>;
                };
+
+               mailbox@7e00b840 {
+                       compatible = "brcm,bcm2835-vchiq";
+                       reg = <0x7e00b840 0xf>;
+                       interrupts = <0 2>;
+               };
        };
 };
 
diff -r 178e6dafe74d -r 364350e2dc78 sys/external/gpl2/dts/dist/arch/arm/boot/dts/bcm283x.dtsi
--- a/sys/external/gpl2/dts/dist/arch/arm/boot/dts/bcm283x.dtsi Sat Apr 28 18:26:53 2018 +0000
+++ b/sys/external/gpl2/dts/dist/arch/arm/boot/dts/bcm283x.dtsi Sat Apr 28 18:28:25 2018 +0000
@@ -2,6 +2,7 @@
 #include <dt-bindings/clock/bcm2835.h>
 #include <dt-bindings/clock/bcm2835-aux.h>
 #include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/interrupt-controller/irq.h>
 
 /* firmware-provided startup stubs live here, where the secondary CPUs are
  * spinning.
@@ -222,6 +223,7 @@
                        gpclk2_gpio43: gpclk2_gpio43 {
                                brcm,pins = <43>;
                                brcm,function = <BCM2835_FSEL_ALT0>;
+                               brcm,pull = <BCM2835_PUD_OFF>;
                        };
 
                        i2c0_gpio0: i2c0_gpio0 {
@@ -251,7 +253,7 @@
 
                        jtag_gpio4: jtag_gpio4 {
                                brcm,pins = <4 5 6 12 13>;
-                               brcm,function = <BCM2835_FSEL_ALT4>;
+                               brcm,function = <BCM2835_FSEL_ALT5>;
                        };
                        jtag_gpio22: jtag_gpio22 {
                                brcm,pins = <22 23 24 25 26 27>;
@@ -334,10 +336,12 @@
                        uart0_ctsrts_gpio30: uart0_ctsrts_gpio30 {
                                brcm,pins = <30 31>;
                                brcm,function = <BCM2835_FSEL_ALT3>;
+                               brcm,pull = <BCM2835_PUD_UP BCM2835_PUD_OFF>;
                        };
                        uart0_gpio32: uart0_gpio32 {
                                brcm,pins = <32 33>;
                                brcm,function = <BCM2835_FSEL_ALT3>;
+                               brcm,pull = <BCM2835_PUD_OFF BCM2835_PUD_UP>;
                        };
                        uart0_gpio36: uart0_gpio36 {
                                brcm,pins = <36 37>;
@@ -396,8 +400,8 @@
 
                i2s: i2s@7e203000 {
                        compatible = "brcm,bcm2835-i2s";
-                       reg = <0x7e203000 0x20>,
-                             <0x7e101098 0x02>;
+                       reg = <0x7e203000 0x24>;
+                       clocks = <&clocks BCM2835_CLOCK_PCM>;
 
                        dmas = <&dma 2>,
                               <&dma 3>;
@@ -437,6 +441,17 @@
                        interrupts = <2 14>; /* pwa1 */
                };
 
+               dpi: dpi@7e208000 {
+                       compatible = "brcm,bcm2835-dpi";
+                       reg = <0x7e208000 0x8c>;
+                       clocks = <&clocks BCM2835_CLOCK_VPU>,
+                                <&clocks BCM2835_CLOCK_DPI>;
+                       clock-names = "core", "pixel";
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+                       status = "disabled";
+               };
+
                dsi0: dsi@7e209000 {
                        compatible = "brcm,bcm2835-dsi0";
                        reg = <0x7e209000 0x78>;
@@ -464,7 +479,7 @@
                        status = "disabled";
                };
 
-               aux: aux@0x7e215000 {
+               aux: aux@7e215000 {
                        compatible = "brcm,bcm2835-aux";
                        #clock-cells = <1>;
                        reg = <0x7e215000 0x8>;
@@ -654,5 +669,6 @@
 
        usbphy: phy {
                compatible = "usb-nop-xceiv";
+               #phy-cells = <0>;
        };
 };
diff -r 178e6dafe74d -r 364350e2dc78 sys/external/gpl2/dts/dist/arch/arm/boot/dts/cloudengines-pogoplug-series-3.dts
--- a/sys/external/gpl2/dts/dist/arch/arm/boot/dts/cloudengines-pogoplug-series-3.dts   Sat Apr 28 18:26:53 2018 +0000
+++ /dev/null   Thu Jan 01 00:00:00 1970 +0000
@@ -1,94 +0,0 @@
-/*
- * cloudengines-pogoplug-series-3.dtsi - Device tree file for Cloud Engines PogoPlug Series 3
- *
- * Copyright (C) 2016 Neil Armstrong <narmstrong%baylibre.com@localhost>
- *
- * Licensed under GPLv2 or later
- */
-
-/dts-v1/;
-#include "ox820.dtsi"
-
-/ {
-       model = "Cloud Engines PogoPlug Series 3";
-
-       compatible = "cloudengines,pogoplugv3", "oxsemi,ox820";
-
-       chosen {
-               bootargs = "earlyprintk";
-               stdout-path = "serial0:115200n8";
-       };
-
-       memory {
-               /* 128Mbytes DDR */
-               reg = <0x60000000 0x8000000>;
-       };
-
-       aliases {
-               serial0 = &uart0;
-               gpio0 = &gpio0;
-               gpio1 = &gpio1;
-       };
-
-       leds {
-               compatible = "gpio-leds";
-
-               blue {
-                       label = "pogoplug:blue";
-                       gpios = <&gpio0 2 0>;
-                       default-state = "keep";
-               };
-
-               orange {
-                       label = "pogoplug:orange";
-                       gpios = <&gpio1 16 1>;
-                       default-state = "keep";
-               };
-
-               green {
-                       label = "pogoplug:green";
-                       gpios = <&gpio1 17 1>;
-                       default-state = "keep";
-               };
-       };
-};
-
-&uart0 {
-       status = "okay";
-
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_uart0>;
-};
-
-&nandc {
-       status = "okay";
-
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_nand>;
-
-       nand@0 {
-               reg = <0>;
-               #address-cells = <1>;
-               #size-cells = <1>;
-               nand-ecc-mode = "soft";
-               nand-ecc-algo = "hamming";
-
-               partition@0 {
-                       label = "boot";
-                       reg = <0x00000000 0x00e00000>;
-                       read-only;
-               };
-
-               partition@e00000 {
-                       label = "ubi";
-                       reg = <0x00e00000 0x07200000>;
-               };
-       };
-};
-
-&etha {
-       status = "okay";
-
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_etha_mdio>;
-};
diff -r 178e6dafe74d -r 364350e2dc78 sys/external/gpl2/dts/dist/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi
--- a/sys/external/gpl2/dts/dist/arch/arm/boot/dts/imx6qdl-microsom-ar8035.dtsi Sat Apr 28 18:26:53 2018 +0000
+++ /dev/null   Thu Jan 01 00:00:00 1970 +0000
@@ -1,99 +0,0 @@
-/*
- * Copyright (C) 2013,2014 Russell King
- *
- * This describes the hookup for an AR8035 to the iMX6 on the SolidRun
- * MicroSOM.
- *
- * This file is dual-licensed: you can use it either under the terms
- * of the GPL or the X11 license, at your option. Note that this dual
- * licensing only applies to this file, and not this project as a
- * whole.
- *
- *  a) This file is free software; you can redistribute it and/or
- *     modify it under the terms of the GNU General Public License
- *     version 2 as published by the Free Software Foundation.
- *
- *     This file is distributed in the hope that it will be useful,
- *     but WITHOUT ANY WARRANTY; without even the implied warranty of
- *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- *     GNU General Public License for more details.
- *
- * Or, alternatively,
- *
- *  b) Permission is hereby granted, free of charge, to any person
- *     obtaining a copy of this software and associated documentation
- *     files (the "Software"), to deal in the Software without
- *     restriction, including without limitation the rights to use,
- *     copy, modify, merge, publish, distribute, sublicense, and/or
- *     sell copies of the Software, and to permit persons to whom the
- *     Software is furnished to do so, subject to the following
- *     conditions:
- *
- *     The above copyright notice and this permission notice shall be
- *     included in all copies or substantial portions of the Software.
- *
- *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
- *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
- *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
- *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
- *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
- *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- *     OTHER DEALINGS IN THE SOFTWARE.
- */
-&fec {
-       pinctrl-names = "default";
-       pinctrl-0 = <&pinctrl_microsom_enet_ar8035>;
-       phy-mode = "rgmii";
-       phy-reset-duration = <2>;
-       phy-reset-gpios = <&gpio4 15 GPIO_ACTIVE_LOW>;
-       status = "okay";
-};
-
-&iomuxc {
-       enet {
-               pinctrl_microsom_enet_ar8035: microsom-enet-ar8035 {
-                       fsl,pins = <
-                               MX6QDL_PAD_ENET_MDIO__ENET_MDIO         0x1b8b0
-                               MX6QDL_PAD_ENET_MDC__ENET_MDC           0x1b0b0
-                               /* AR8035 reset */
-                               MX6QDL_PAD_KEY_ROW4__GPIO4_IO15         0x130b0
-                               /* AR8035 interrupt */
-                               MX6QDL_PAD_DI0_PIN2__GPIO4_IO18         0x80000000
-                               /* GPIO16 -> AR8035 25MHz */
-                               MX6QDL_PAD_GPIO_16__ENET_REF_CLK        0xc0000000
-                               MX6QDL_PAD_RGMII_TXC__RGMII_TXC         0x80000000
-                               MX6QDL_PAD_RGMII_TD0__RGMII_TD0         0x1b030
-                               MX6QDL_PAD_RGMII_TD1__RGMII_TD1         0x1b030
-                               MX6QDL_PAD_RGMII_TD2__RGMII_TD2         0x1b030
-                               MX6QDL_PAD_RGMII_TD3__RGMII_TD3         0x1b030
-                               MX6QDL_PAD_RGMII_TX_CTL__RGMII_TX_CTL   0x1b030
-                               /* AR8035 CLK_25M --> ENET_REF_CLK (V22) */
-                               MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK    0x0a0b1
-                               /* AR8035 pin strapping: IO voltage: pull up */
-                               MX6QDL_PAD_RGMII_RXC__RGMII_RXC         0x1b030
-                               /* AR8035 pin strapping: PHYADDR#0: pull down */
-                               MX6QDL_PAD_RGMII_RD0__RGMII_RD0         0x13030
-                               /* AR8035 pin strapping: PHYADDR#1: pull down */
-                               MX6QDL_PAD_RGMII_RD1__RGMII_RD1         0x13030
-                               /* AR8035 pin strapping: MODE#1: pull up */
-                               MX6QDL_PAD_RGMII_RD2__RGMII_RD2         0x1b030
-                               /* AR8035 pin strapping: MODE#3: pull up */
-                               MX6QDL_PAD_RGMII_RD3__RGMII_RD3         0x1b030
-                               /* AR8035 pin strapping: MODE#0: pull down */
-                               MX6QDL_PAD_RGMII_RX_CTL__RGMII_RX_CTL   0x13030
-



Home | Main Index | Thread Index | Old Index