On Thursday 11 October 2007 09:53:22 Joerg Sonnenberger wrote:
> On Thu, Oct 11, 2007 at 09:36:49AM +0200, Christoph Egger wrote:
> > The interrupt problem is still there.
>
> When you boot a kernel with MPVERBOSE or use boot -d and
> "w mp_verbose 1", what does it give you as ISA overrides?
> I have a report with issues for the very same chipset, where the ISA
> overrides for IRQ 14 and 15 force edge interrupts. That's the note in
> parenthesis from ISA interrupt override.

The XEN3_DOM0 kernel already contains:

options         MPBIOS
options         MPDEBUG
options         MPVERBOSE
options         ACPIVERBOSE

and the one I compile my kernel additionally has:

options         LOCKDEBUG
options         VNODE_LOCKDEBUG
options         MALLOC_DEBUG
options         UVMHIST


>
> > @joerg: You asked me in private mail, what IRQs 2 and 4 are used for.
> > IRQ 4 is for the serial console and IRQ is the timer, Xen uses for
> > scheduling.
>
> I would expect it to use either the LAPIC or IRQ 0 for that, which is
> why I asked. We don't currently have a good mechanism to include
> properties to tell the IOAPIC which interrupts to configure correctly,
> that's why I am inclined to not want to revert this.
>
> Joerg