From: "Matthias Scheler" <tron@zhadum.de>
> In article <20050318165855.GB6095@antioche.lip6.fr>,
> Manuel Bouyer <bouyer@antioche.lip6.fr> writes:
>> Well, is seems that the FPU stuff needs more work. From xen/i386/npx.c:
>> int
>> npxintr(void *arg, struct intrframe iframe)
>> {
>>         struct cpu_info *ci = curcpu();
>>         struct lwp *l = ci->ci_fpcurlwp;
>>         union savefpu *addr;
>>         struct intrframe *frame = &iframe;
>>         struct npx_softc *sc;
>>         ksiginfo_t ksi;
>>
>>         sc = npx_softc;
>>
>>         uvmexp.traps++;
>>         IPRINTF(("%s: fp intr\n", ci->ci_dev->dv_xname));
>>         panic("not supported\n");
>
> This code handles FPU exceptions, correct? Will each domain see its on
> exception or has domain0 to handle them all?

It handles FPU errors, the context switching part of FPU exception handling 
is in npxdna_*.  Both types of exceptions get always passed up to the domain 
causing the exception.  I would try removing the panic and also commenting 
out the bus_space_write which is just following it.  The rest of the code 
looks like it could just work...

     christian