On Sat 03 Jul 2021 at 13:14:46 +0200, Anders Magnusson wrote:
> All of these steps are (mostly) independent of each other, therefore they
> can easily be pipelined.
Until you get to instructions with modify a register in one operand and
use it again in another :) such as (ok I took those examples from the
PDP-11 architecture handbook in the section where it describes how
different models do different things; but for a VAX you'd have to be
careful too and with 6 operands the number of combinations is much worse)
ADD Rx,(Rx)+ ; Rx gets incremented or not before being
ADD Rx,@-(Rx) ; used as a source operand
MOV PC,offset(Rx) ; value of PC either before or after fetching
; offset from the instruction stream
JMP (Rx)+ ; Rx gets incremented or not before being
; copied to PC
and JMP is weird because it's more like a LEA arg,PC, if there were a
Load Effective Address instruction.
-Olaf.
--
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