<What I seem to have trouble finding is the CLOCK speeds of the various
<models.

That would have the least meaning as some are scaled.  For example my 
amd5x86 uses a 40mhz clock, computes at 120mhz.  from one vax chip to 
another that also happens or the instruction execution in Tcycles was 
tinkered.  

as to one VUP~=1MIPs it's actually close.  the difference however is 
MIPs is strictly instruction execution speed(CISC will tend to look better)
and there is no effects of IO factored in.

The best example of how meaningless MIPs can be.  PII/400 box, load a 
CDrom in the 40x drive and wait, and wait not for a slow CPU but for the 
IOsystem to catch up.  Does little good to execute instructions fast if 
they have to come to you over eitherpipe or other slow means.

Allison