Subject: Re: SCSI on Q-bus
To: None <port-vax@NetBSD.ORG>
From: Allison J Parent <email@example.com>
Date: 02/04/1998 18:02:53
<It looks like IDE will be the way to go, Allison has done a good proposa
<here. Now we need to collect up the data sheets and make them availible
<that a hardware design could be started. I would suggest that we stay aw
<from surface mount components if we plan on making bare boards availible
Assuming IDE for a moment for PIO with interrupts the chip count for
ssi/msi generic ttl would be in under 20 pieces the most complex would
something like ls273 and ls688. The board for such a endevor would not
have to be more than two layers plated through and wirewrap protos would
be very doable.
If anyone has a copy of the microcomputer interfaces handbook (DEC 1980)
the DRV11P and bus timing/interface is in there. The basic logic for an
interface to Qbus is address latch/recognition, bus buffering (byte/word)
and interrupt generation/grant. The IDE side is byte or word depending
on the address(register) written to or read from and the VAX/PDP-11
read before write must be dealt with. PIO would be about as invloved
as a DLV-11E/F serial card.
The driver software however is a whole nother thing.