Stopping the timekeeper clock (Was: New Timekeeper/RAM clock stops on power loss?)

[Julian Coleman <jdc%coris.org.uk@localhost>]

Hi all,

Inspired by: a) my E250 having a dead clock battery (which means that it
took 20 minutes to start up and OFW failed all the RAM) and; b) the
following:

>                                                      It is possible to
> stop the chip's clock from OBP, but not by default as far as I can
> tell; nvramrc on my SPARCs includes
> 
> : stop-clock f1201000 f 0 map-page 80 ff8 c! 80 ff9 c! 0 ff8 c! ;
> 
> (for SS20; depending on the machine, some of the numbers may need to
> change).  When the machine is going to be powered down more than
> briefly, I use that first, to preserve what battery life remains.

I looked at the specifications for the clock chips on sparc/sparc64
(m48txx and bq4802y) to check how the clock oscillator is stopped.  It's
just a single bit to write to, so easy to do.  While looking, I noticed
that the m48t59 and bq4802y also set a flag to indicate low battery
voltage.

I've added code to stop or start the oscillator, and view the low voltage
flag.  If you plan to power off your Sun for a while, this should be
useful.

On my U45, I now have (e.g.):
  # envstat -d bq4802rtc0
                     Current  CritMax  WarnMax  WarnMin  CritMin  Unit
  [bq4802rtc0]
    battery low:     FALSE
  # sysctl hw.bq4802rtc0
  hw.bq4802rtc0.stop_oscillator = 1
  # dmesg | grep bq4802rtc0
  [     1.000000] bq4802rtc0 at ebus0 addr 100000-10000f: real time clock
  [     1.000000] bq4802rtc0: autoconfiguration error: WARNING: oscillator is stopped (0x02)

and on my E250 and U2, I have:
  # envstat -d clock0
                     Current  CritMax  WarnMax  WarnMin  CritMin  Unit
  [clock0]
    battery low:      TRUE
  # sysctl hw.clock0
  hw.clock0.stop_oscillator = 0
  # dmesg | grep clock
  [     1.000000] clock0 at sbus0 slot 15 offset 0x1200000: mk48t59
  [    32.180024] clock0: critical limit on 'battery low'

(the U45 has a new battery here, but I stopped the oscillator, whilst the
 E250 and U2 didn't have new batteries when I ran this)

If anyone is interested in trying out the patches, I've uploaded them to:
  https://ftp.netbsd.org/pub/NetBSD/misc/jdc/sparc64/bq4802.diff
  https://ftp.netbsd.org/pub/NetBSD/misc/jdc/sparc64/mk48txx.diff

and I've put kernels at:
  https://ftp.netbsd.org/pub/NetBSD/misc/jdc/sparc64/netbsd-GENERIC
  https://ftp.netbsd.org/pub/NetBSD/misc/jdc/sparc/netbsd-GENERIC

On the U2 and E250, the firmware starts the oscillator, so you could stop
the oscillator from NetBSD and it would be automatically restarted.  On the
U45, it isn't started by the firmware, so the driver logs a warning at boot
time.

I haven't tried this out yet on sparc (nor sun3).  They have m48t08 or
m48t02 without a battery low flag, so there will only be the sysctl to
stop/start the oscillator.  I don't know if their firmware starts the
oscillator or not, so the m48txx driver will also log a warning at boot
time if it is stopped.

Regards,

J

PS.  Other machines (e.g. SB2000, V240) have ds1287, m5819p or similar
chips for the RTC plus external batteries, and don't have the ability to
stop the clock oscillator (that I can see).

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