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Re: UltraSPARC III cpufreq driver, please test



        Hello,

I have done some modifications. You will find in attachment a new driver (patch against 7.99.1 kernel). Please test.

It seems to works on my Blade 2000 (USIII, not III+). I don't know why I only see debug messages during boot. How can I check if schizo_set_cpufreq() is called after boot ?

Second question : why do both CPU run at the same frequencies ? I have set cf_mp to true...

        Third question : I assume that schizo0 controls cpu0. Is it always true 
?

        Best regards,

        JKB
Index: dev/schizo.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/dev/schizo.c,v
retrieving revision 1.31
diff -u -r1.31 schizo.c
--- dev/schizo.c        21 Jun 2013 20:09:58 -0000      1.31
+++ dev/schizo.c        10 Sep 2014 19:49:34 -0000
@@ -5,6 +5,7 @@
  * Copyright (c) 2002 Jason L. Wright (jason%thought.net@localhost)
  * Copyright (c) 2003 Henric Jungheim
  * Copyright (c) 2008, 2009, 2010, 2012 Matthew R. Green
+ * Copyright (c) 2014 Joël Bertrand (joel.bertrand%systella.fr@localhost)
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -41,6 +42,8 @@
 #include <sys/systm.h>
 #include <sys/time.h>
 #include <sys/reboot.h>
+#include <sys/cpu.h>
+#include <sys/cpufreq.h>
 
 #define _SPARC_BUS_DMA_PRIVATE
 #include <sys/bus.h>
@@ -86,6 +89,9 @@
 int schizo_safari_error(void *);
 int schizo_pci_error(void *);
 
+void schizo_get_cpufreq(void *, void *);
+void schizo_set_cpufreq(void *, void *);
+
 pci_chipset_tag_t schizo_alloc_chipset(struct schizo_pbm *, int,
     pci_chipset_tag_t);
 bus_space_tag_t schizo_alloc_mem_tag(struct schizo_pbm *);
@@ -136,6 +142,100 @@
 }
 
 void
+schizo_set_cpufreq(void *aux, void *freq)
+{
+       uint32_t        f;
+
+       uint64_t        cmd;
+       uint64_t        esctrl;
+
+       struct schizo_softc *sc;
+
+       f = (*((uint32_t *) freq));
+       sc = curcpu()->sc;
+
+       if (sc == NULL)
+               return;
+
+       if (f == sc->sc_cf.cf_state[0].cfs_freq)
+               cmd = SCZ_ESCTRL_CLK_MAX;
+       else if (f == sc->sc_cf.cf_state[1].cfs_freq)
+               cmd = SCZ_ESCTRL_CLK_DIV_2;
+       else if (f == sc->sc_cf.cf_state[2].cfs_freq)
+               cmd = SCZ_ESCTRL_CLK_DIV_32;
+       else
+       {
+               aprint_error("cpufreq failed: switching to max frequency\n");
+               cmd = SCZ_ESCTRL_CLK_MAX;
+       }
+
+       esctrl = schizo_read(sc, SCZ_ESCTRL);
+       esctrl &= (~SCZ_ESCTRL_CLK_MASK);
+       esctrl |= cmd;
+       schizo_write(sc, SCZ_ESCTRL, esctrl);
+
+       aprint_normal("schizo_set_cpufreq %u MHz (cpu %lu)\n", f,
+                       (unsigned long) cpu_number());
+}
+
+void
+schizo_get_cpufreq(void *aux, void *freq)
+{
+       uint32_t        f;
+       uint64_t        esctrl;
+
+       struct schizo_softc *sc;
+
+       sc = curcpu()->sc;
+
+       if (sc == NULL)
+               return;
+
+       esctrl = schizo_read(sc, SCZ_ESCTRL);
+
+       switch(esctrl & (~SCZ_ESCTRL_CLK_MASK))
+       {
+               default:
+               case SCZ_ESCTRL_CLK_MAX:
+                       f = sc->sc_cf.cf_state[0].cfs_freq;
+                       break;
+
+               case SCZ_ESCTRL_CLK_DIV_2:
+                       f = sc->sc_cf.cf_state[1].cfs_freq;
+                       break;
+
+               case SCZ_ESCTRL_CLK_DIV_32:
+                       f = sc->sc_cf.cf_state[2].cfs_freq;
+                       break;
+       }
+
+       (*((uint32_t *) freq)) = f;
+       aprint_normal("schizo_get_cpufreq %u MHz (cpu %lu)\n", f,
+                       (unsigned long) cpu_number());
+}
+
+static void
+schizo_setup_cpufreq(device_t dev)
+{
+       // schizo_setup_cpufreq() is calling once by each schizo_attach().
+
+       struct schizo_softc *sc = device_private(dev);
+       int     ret;
+
+aprint_normal("device_unit(dev)=%d\n", device_unit(dev));      
+       cpu_lookup(device_unit(dev))->sc = sc;
+
+       if (device_unit(dev) == 0)
+       {
+               aprint_normal("register safari cpufreq driver\n");
+               ret = cpufreq_register(&(sc->sc_cf));
+
+               if (ret != 0)
+                       aprint_error_dev(sc->sc_dev, "failed to register 
cpufreq\n");
+       }
+}
+
+void
 schizo_attach(device_t parent, device_t self, void *aux)
 {
        struct schizo_softc *sc = device_private(self);
@@ -318,6 +418,26 @@
        schizo_set_intr(sc, pbm, PIL_HIGH, schizo_safari_error, sc,
            SCZ_SERR_INO, "safari");
 
+       /*
+        * Register with cpufreq(9)
+        */
+
+       (void) memset(&(sc->sc_cf), 0, sizeof(struct cpufreq));
+
+       sc->sc_cf.cf_state[0].cfs_freq = (uint32_t) 
(curcpu()->ci_cpu_clockrate[1]);
+       sc->sc_cf.cf_state[1].cfs_freq = sc->sc_cf.cf_state[0].cfs_freq / 2;
+       sc->sc_cf.cf_state[2].cfs_freq = sc->sc_cf.cf_state[0].cfs_freq / 32;
+       sc->sc_cf.cf_state_count = 3;
+
+       sc->sc_cf.cf_mp = true;
+       sc->sc_cf.cf_cookie = NULL;
+       sc->sc_cf.cf_get_freq = schizo_get_cpufreq;
+       sc->sc_cf.cf_set_freq = schizo_set_cpufreq;
+
+       (void) strlcpy(sc->sc_cf.cf_name, "safari", sizeof(sc->sc_cf.cf_name));
+
+       config_interrupts(sc->sc_dev, schizo_setup_cpufreq);
+
        if (sc->sc_tomatillo) {
                /*
                 * Enable the IOCACHE.
Index: dev/schizoreg.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/dev/schizoreg.h,v
retrieving revision 1.9
diff -u -r1.9 schizoreg.h
--- dev/schizoreg.h     25 Mar 2012 03:13:08 -0000      1.9
+++ dev/schizoreg.h     10 Sep 2014 19:49:34 -0000
@@ -4,6 +4,7 @@
 /*
  * Copyright (c) 2002 Jason L. Wright (jason%thought.net@localhost)
  * Copyright (c) 2010 Matthew R. Green
+ * Copyright (c) 2014 Joël Bertrand (joel.bertrand%systella.fr@localhost)
  * All rights reserved.
  *
  * Redistribution and use in source and binary forms, with or without
@@ -15,7 +16,7 @@
  *    notice, this list of conditions and the following disclaimer in the
  *    documentation and/or other materials provided with the distribution.
  *
- * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ e THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
@@ -76,8 +77,9 @@
        volatile u_int64_t      ue_afar;
        volatile u_int64_t      ce_afsr;
        volatile u_int64_t      ce_afar;
+       volatile u_int64_t      esctrl;
 
-       volatile u_int64_t      _unused4[253942];
+       volatile u_int64_t      _unused4[253941];
        struct schizo_pbm_regs pbm_a;
        struct schizo_pbm_regs pbm_b;
 };
@@ -101,6 +103,7 @@
 #define        SCZ_UE_AFAR                     0x10038
 #define        SCZ_CE_AFSR                     0x10040
 #define        SCZ_CE_AFAR                     0x10048
+#define SCZ_ESCTRL                     0x10050
 
 /* These are relative to the PBM */
 #define        SCZ_PCI_IOMMU_CTRL              0x00200
@@ -298,3 +301,8 @@
        u_int32_t       size_hi;
        u_int32_t       size_lo;
 };
+
+#define SCZ_ESCTRL_CLK_MAX             0x0000000000000000UL
+#define SCZ_ESCTRL_CLK_DIV_2   0x0000000040000000UL
+#define SCZ_ESCTRL_CLK_DIV_32  0x0000000080000000UL
+#define SCZ_ESCTRL_CLK_MASK            0x00000000C0000000UL
Index: dev/schizovar.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/dev/schizovar.h,v
retrieving revision 1.6
diff -u -r1.6 schizovar.h
--- dev/schizovar.h     25 Mar 2012 03:13:08 -0000      1.6
+++ dev/schizovar.h     10 Sep 2014 19:49:34 -0000
@@ -64,6 +64,7 @@
        int sc_busa;
        int sc_tomatillo;
        uint32_t sc_ver;
+       struct cpufreq sc_cf;
 };
 
 #define        schizo_read(sc,r) \
Index: include/cpu.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/include/cpu.h,v
retrieving revision 1.112
diff -u -r1.112 cpu.h
--- include/cpu.h       4 Sep 2014 18:48:29 -0000       1.112
+++ include/cpu.h       10 Sep 2014 19:49:34 -0000
@@ -199,6 +199,9 @@
        bool                    ci_pci_fault;
 
        volatile void           *ci_ddb_regs;   /* DDB regs */
+
+       /* cpufreq */
+       void                            *sc;
 };
 
 #endif /* _KERNEL || _KMEMUSER */
Index: sparc64/cpu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/sparc64/cpu.c,v
retrieving revision 1.117
diff -u -r1.117 cpu.c
--- sparc64/cpu.c       1 Sep 2014 19:01:55 -0000       1.117
+++ sparc64/cpu.c       10 Sep 2014 19:49:34 -0000
@@ -362,6 +362,8 @@
        }
        aprint_normal_dev(dev, "");
 
+       ci->sc = NULL;
+
        /* XXX sun4v mising cache info printout */
        bigcache = 0;
 
Copyright (c) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
    2006, 2007, 2008, 2009, 2010, 2011, 2012, 2013, 2014
    The NetBSD Foundation, Inc.  All rights reserved.
Copyright (c) 1982, 1986, 1989, 1991, 1993
    The Regents of the University of California.  All rights reserved.

NetBSD 7.99.1 (GENERIC) #17: Wed Sep 10 21:41:04 CEST 2014
        
root%hilbert.systella.fr@localhost:/usr/obj/sys/arch/sparc64/compile/GENERIC
total memory = 2048 MB
avail memory = 1993 MB
kern.module.path=/stand/sparc64/7.99.1/modules
timecounter: Timecounters tick every 10.000 msec
mainbus0 (root): SUNW,Sun-Blade-1000 (SUNW,Sun-Blade-2000): hostid 8316bb13
cpu0 at mainbus0: SUNW,UltraSPARC-III @ 750 MHz, CPU id 0
cpu0: manuf 3e, impl 14, mask 54
cpu0: system tick frequency 5 MHz
cpu0: 32K instruction (32 b/l), 64K data (32 b/l), 8192K external (512 b/l)
cpu1 at mainbus0: SUNW,UltraSPARC-III @ 750 MHz, CPU id 1
cpu1: manuf 3e, impl 14, mask 54
cpu1: system tick frequency 5 MHz
cpu1: 32K instruction (32 b/l), 64K data (32 b/l), 8192K external (512 b/l)
memory-controller at mainbus0 not configured
memory-controller at mainbus0 not configured
schizo0 at mainbus0: addr 40004700000: "Schizo", version 0, ign 200, bus B 0 to 0
schizo0:  pci0 at schizo0
pci0: i/o space, memory space enabled
ebus0 at pci0 dev 5 function 0
ebus0: Sun Microsystems PCIO Ebus2 (US III), revision 0x01
flashprom at ebus0 addr 0-1fffff not configured
pcfiic0 at ebus0 addr 2e-2f, 2d-2d ipl 23: iic mux present
iic0 at pcfiic0: I2C bus
seeprom0 at iic0 addr 0x50: nvram: size 8192
seeprom1 at iic0 addr 0xd0: dimm-fru: size 8192
seeprom2 at iic0 addr 0xd1: dimm-fru: size 8192
seeprom3 at iic0 addr 0xd2: dimm-fru: size 8192
seeprom4 at iic0 addr 0xd3: dimm-fru: size 8192
seeprom5 at iic0 addr 0xd4: dimm-fru: size 8192
seeprom6 at iic0 addr 0xd5: dimm-fru: size 8192
seeprom7 at iic0 addr 0xd6: dimm-fru: size 8192
seeprom8 at iic0 addr 0xd7: dimm-fru: size 8192
bbc at ebus0 addr 0-fffff not configured
ppm at ebus0 addr e-28, 728000-728003, 30002e-30002f, 300600-300607 not 
configured
pcfiic1 at ebus0 addr 30-31 ipl 23
iic1 at pcfiic1: I2C bus
seeprom9 at iic1 addr 0x50: cpu-fru: size 8192
admtemp0 at iic1 addr 0x18: ADM1021 or compatible environmental sensor
seeprom10 at iic1 addr 0x51: cpu-fru: size 8192
admtemp1 at iic1 addr 0x4c: ADM1021 or compatible environmental sensor
tda0 at iic1 addr 0x24: fan-control
seeprom11 at iic1 addr 0x54: motherboard-fru: size 8192
i2c-bridge at iic1 addr 0x30 not configured
beep at ebus0 addr 32-37 not configured
audiocs0 at ebus0 addr 200000-2000ff, 702000-70200f, 704000-70400f, 
722000-722003 ipl 20 ipl 21: CS4231A
audio0 at audiocs0: full duplex, playback, capture
rtc0 at ebus0 addr 300070-300071 ipl 24: mc146818 compatible time-of-day clock: 
ds1287
gpio at ebus0 addr 300600-300607 not configured
pmc at ebus0 addr 300700-300701 not configured
floppy at ebus0 addr 3023f0-3023f7, 706000-70600f, 720000-720003 ipl 25 not 
configured
lpt0 at ebus0 addr 300278-300287, 30002e-30002f, 700000-70000f ipl 1c
sab0 at ebus0 addr 400000-40007f ipl 22: rev 3.2
sabtty0 at sab0 port 0: console i/o
sabtty1 at sab0 port 1
gem0 at pci0 dev 5 function 1: Sun Microsystems ERI Ethernet (rev. 0x01)
gem0: interrupting at ivec 321d
ukphy0 at gem0 phy 1: OUI 0x0006b8, model 0x000c, rev. 1
ukphy0: 10baseT, 10baseT-FDX, 100baseTX, 100baseTX-FDX, auto
gem0: Ethernet address 00:03:ba:16:bb:13, 2KB RX fifo, 2KB TX fifo
fwohci0 at pci0 dev 5 function 2: Sun Microsystems FireWire Controller (rev. 
0x01)
fwohci0: interrupting at ivec 21e
fwohci0: OHCI version 1.0 (ROM=0)
fwohci0: No. of Isochronous channels is 4.
fwohci0: EUI64 00:03:ba:ff:fe:16:bb:13
fwohci0: Phy 1394a available S400, 4 ports.
fwohci0: Link S400, max_rec 2048 bytes.
ieee1394if0 at fwohci0: IEEE1394 bus
fwip0 at ieee1394if0: IP over IEEE1394
fwohci0: Initiate bus reset
ohci0 at pci0 dev 5 function 3: Sun Microsystems USB Controller (rev. 0x01)
ohci0: interrupting at ivec 21f
ohci0: OHCI version 1.0, legacy support
usb0 at ohci0: USB revision 1.0
esiop0 at pci0 dev 6 function 0: Symbios Logic 53c875 (ultra-wide scsi)
esiop0: using on-board RAM
esiop0: interrupting at ivec 1a18
scsibus0 at esiop0: 16 targets, 8 luns per target
esiop1 at pci0 dev 6 function 1: Symbios Logic 53c875 (ultra-wide scsi)
esiop1: using on-board RAM
esiop1: interrupting at ivec 1a19
scsibus1 at esiop1: 16 targets, 8 luns per target
wcfb0 at pci0 dev 1 function 0: 3D Labs WILDCAT 5110 (rev. 0x01)
schizo1 at mainbus0: addr 40004600000: "Schizo", version 0, ign 200, bus A 0 to 0
schizo1:  pci1 at schizo1
pci1: i/o space, memory space enabled
isp0 at pci1 dev 4 function 0: QLogic FC-AL and Fabric HBA
isp0: interrupting at ivec 204
isp0: invalid NVRAM header
isp0: invalid NVRAM header
isp0: bad frame length (0) from NVRAM- using 1024
isp0: bad execution throttle of 0- using 16
ahc0 at pci1 dev 1 function 0: Adaptec 29160 Ultra160 SCSI adapter
ahc0: interrupting at ivec 200
ahc0: aic7892: Ultra160 Wide Channel A, SCSI Id=7, 32/253 SCBs
scsibus2 at ahc0: 16 targets, 8 luns per target
upa0 at mainbus0
ppm at mainbus0 not configured
pcons at mainbus0 not configured
fwohci0: BUS reset
fwohci0: node_id=0xc800ffc0, gen=1, CYCLEMASTER mode
ieee1394if0: 1 nodes, maxhop <= 0 cable IRM irm(0) (me)
ieee1394if0: bus manager 0
timecounter: Timecounter "clockinterrupt" frequency 100 Hz quality 0
timecounter: Timecounter "tick-counter" frequency 750000000 Hz quality 100
timecounter: Timecounter "stick-counter" frequency 5000000 Hz quality 200
No counter-timer -- using %stick at 5MHz as system clock.
scsibus0: waiting 2 seconds for devices to settle...
scsibus1: waiting 2 seconds for devices to settle...
scsibus2: waiting 2 seconds for devices to settle...
device_unit(dev)=0
register safari cpufreq driver
schizo_set_cpufreq 23 MHz (cpu 0)
device_unit(dev)=1
scsibus3 at isp0: 256 targets, 8 luns per target
uhub0 at usb0: Sun Microsystems OHCI root hub, class 9/0, rev 1.00/1.00, addr 1
uhub0: 4 ports with 4 removable, self powered
scsibus3: waiting 2 seconds for devices to settle...
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 375 MHz (cpu 1)
schizo_set_cpufreq 375 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 375 MHz (cpu 0)
schizo_set_cpufreq 375 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 375 MHz (cpu 0)
schizo_set_cpufreq 375 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 375 MHz (cpu 0)
schizo_set_cpufreq 375 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 375 MHz (cpu 0)
schizo_set_cpufreq 375 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 375 MHz (cpu 0)
schizo_set_cpufreq 375 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 375 MHz (cpu 0)
schizo_set_cpufreq 375 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 375 MHz (cpu 0)
schizo_set_cpufreq 375 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 375 MHz (cpu 0)
schizo_set_cpufreq 375 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 375 MHz (cpu 0)
schizo_set_cpufreq 375 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
cd0 at scsibus0 target 6 lun 0: <TOSHIBA, DVD-ROM SD-M1401, 1009> cdrom 
removable
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
cd0: sync (50.00ns offset 16), 8-bit (20.000MB/s) transfers
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
schizo_set_cpufreq 23 MHz (cpu 0)
schizo_set_cpufreq 23 MHz (cpu 1)
schizo_set_cpufreq 750 MHz (cpu 0)
schizo_set_cpufreq 750 MHz (cpu 1)
sd0 at scsibus3 target 0 lun 0: <SEAGATE, ST3146807FC, 0006> disk fixed
sd0: 136 GB, 49855 cyl, 8 head, 718 sec, 512 bytes/sect x 286749488 sectors
sd1 at scsibus3 target 1 lun 0: <SEAGATE, ST3146807FC, 0006> disk fixed
sd1: 136 GB, 49855 cyl, 8 head, 718 sec, 512 bytes/sect x 286749488 sectors
Kernelized RAIDframe activated
raid0: RAID Level 1
raid0: Components: /dev/sd0a /dev/sd1a
raid0: Total Sectors: 286749312 (140014 MB)
root on raid0a dumps on raid0b
root file system type: ffs
raid0: Device already configured!


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