Re: RED State Exception on E3500

[Julian Coleman <jdc%coris.org.uk@localhost>]

Hi,

> Do we need to do something special to handle these?

I tried disabling the instruction and data caches with the attached patch,
but still get RED State Exceptions.  Maybe the patch doesn't actually
disable the caches?

Thanks,

J

-- 
  My other computer also runs NetBSD    /        Sailing at Newbiggin
        http://www.netbsd.org/        /   http://www.newbigginsailingclub.org/

Index: src/sys/arch/sparc64/sparc64/cache.h
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/sparc64/cache.h,v
retrieving revision 1.22
diff -u -r1.22 cache.h
--- src/sys/arch/sparc64/sparc64/cache.h        6 Jun 2011 02:49:39 -0000       
1.22
+++ src/sys/arch/sparc64/sparc64/cache.h        5 Sep 2011 13:42:01 -0000
@@ -96,6 +96,7 @@
 void   sp_blast_dcache(int, int);      /* Clear entire D$ */
 void   blast_icache_us(void);          /* Clear entire I$ */
 void   blast_icache_usiii(void);       /* Clear entire I$ */
+void   disable_cache(void);            /* Disable I$ and D$ */
 
 /* The following flush a range from the D$ and I$ but not E$. */
 void   cache_flush_phys_us(paddr_t, psize_t, int);
Index: src/sys/arch/sparc64/sparc64/cpu.c
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/sparc64/cpu.c,v
retrieving revision 1.100
diff -u -r1.100 cpu.c
--- src/sys/arch/sparc64/sparc64/cpu.c  12 Jul 2011 07:51:34 -0000      1.100
+++ src/sys/arch/sparc64/sparc64/cpu.c  5 Sep 2011 13:42:01 -0000
@@ -267,6 +267,7 @@
         * For other cpus, we need to call mi_cpu_attach()
         * and complete setting up cpcb.
         */
+       disable_cache();
        if (ci->ci_flags & CPUF_PRIMARY) {
                fpstate_cache = pool_cache_init(sizeof(struct fpstate64),
                                        SPARC64_BLOCK_SIZE, 0, 0, "fpstate",
Index: src/sys/arch/sparc64/sparc64/locore.s
===================================================================
RCS file: /cvsroot/src/sys/arch/sparc64/sparc64/locore.s,v
retrieving revision 1.338
diff -u -r1.338 locore.s
--- src/sys/arch/sparc64/sparc64/locore.s       4 Sep 2011 12:17:13 -0000       
1.338
+++ src/sys/arch/sparc64/sparc64/locore.s       5 Sep 2011 13:42:05 -0000
@@ -6241,3 +6241,19 @@
        .comm   _C_LABEL(trapdebug), 4
        .comm   _C_LABEL(pmapdebug), 4
 #endif
+
+ENTRY(disable_cache)
+       rdpr    %pstate, %o3
+       andn    %o3, PSTATE_IE, %o4                     ! Turn off PSTATE_IE bit
+       wrpr    %o4, 0, %pstate
+       ldxa    [%g0] ASI_MCCR, %o5
+       andn    %o5, MCCR_ICACHE_EN|MCCR_DCACHE_EN, %o4
+       andn    %o5, MCCR_DCACHE_EN, %o4
+1:
+       stxa    %o4, [%g0] ASI_MCCR
+       sethi   %hi(KERNBASE), %o5
+       flush   %o5
+       retl
+        wrpr   %o3, %pstate