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Re: Netra X1 with WD0 and AcerIDE



Very cool. Thank you all so much for working out the details on this so it can be committed into the code. I'll be able to remove that special "please use PIO on wd1" flags-setting from my kernel config for that machine now...

  Perhaps this can be pulled up into netbsd-5 after the release of 5.1?

                                        - Chris


On 11/01/2010 07:15 AM, Takeshi Nakayama wrote:
Hello,

I have replaced one of a couple of 120GB drives on my Netra X1 with
spare 160GB one to confirm the patch works as expected.

The result is as below.

% disklabel wd0 | tail -2
  g:  17788800 250646640     4.2BSD   1024  8192     0  # (Cyl.  61433 -  65792)
  h:  44137440 268435440     4.2BSD   2048 16384     0  # (Cyl.  65793 -  76610)
               ~~~~~~~~~<= 0x0ffffff0

% dd bs=64k count=1024 if=/dev/rwd0g of=/dev/null
1024+0 records in
1024+0 records out
67108864 bytes transferred in 1.907 secs (35190804 bytes/sec)<= DMA transfer

% dd bs=64k count=1024 if=/dev/rwd0h of=/dev/null
1024+0 records in
1024+0 records out
67108864 bytes transferred in 19.847 secs (3381310 bytes/sec)<= PIO transfer

So, I will commit this patch within a few days.

-- Takeshi Nakayama


Takeshi Nakayama<tn%catvmics.ne.jp@localhost>  wrote
Martin Husemann<martin%duskware.de@localhost>  wrote
The real solution is to do this all automatically, like the code Takeshi
quoted from FreeBSD does.
I saw our codes have a helpful hook, so I made a quick fix.

I cannot test with over 137GB drive since my Netra have a couple of
120GB drives, so please test this.

-- Takeshi Nakayama


Index: sys/dev/pci/aceride.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/aceride.c,v
retrieving revision 1.27
diff -u -d -r1.27 aceride.c
--- sys/dev/pci/aceride.c       8 May 2010 19:49:02 -0000       1.27
+++ sys/dev/pci/aceride.c       26 Oct 2010 13:12:03 -0000
@@ -41,6 +41,7 @@
  static void acer_chip_map(struct pciide_softc*, struct pci_attach_args*);
  static void acer_setup_channel(struct ata_channel*);
  static int  acer_pci_intr(void *);
+static int  acer_dma_init(void *, int, int, void *, size_t, int);

  static int  aceride_match(device_t, cfdata_t, void *);
  static void aceride_attach(device_t, device_t, void *);
@@ -139,6 +140,12 @@
                                sc->sc_wdcdev.sc_atac.atac_udma_cap = 2;
                }
                sc->sc_wdcdev.irqack = pciide_irqack;
+               if (rev<= 0xc4) {
+                       sc->sc_wdcdev.dma_init = acer_dma_init;
+                       aprint_verbose_dev(sc->sc_wdcdev.sc_atac.atac_dev,
+                        "using PIO transfer above 137GB as workaround for "
+                        "48bit DMA access bug, expect reduced performance\n");
+               }
        }

        sc->sc_wdcdev.sc_atac.atac_pio_cap = 4;
@@ -370,3 +377,15 @@
        }
        return rv;
  }
+
+static int
+acer_dma_init(void *v, int channel, int drive, void *databuf,
+    size_t datalen, int flags)
+{
+
+       /* use PIO for LBA48 transfer */
+       if (flags&  WDC_DMA_LBA48)
+               return EINVAL;
+
+       return pciide_dma_init(v, channel, drive, databuf, datalen, flags);
+}



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