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Re: Netra X1 with WD0 and AcerIDE



Hello,

The problem is that M5229 rev. 0xc3 cannot handle DMA with LBA48
accesses.

See the thread starting:
  http://mail-index.netbsd.org/port-sparc64/2010/05/11/msg001307.html

-- Takeshi Nakayama


>>> matthew green <mrg%eterna.com.au@localhost> wrote

> 
> > > > aceride0 at pci0 dev 13 function 0
> > > > aceride0: Acer Labs M5229 UDMA IDE Controller (rev. 0xc3)
> > > 
> > > i notice that openbsd disables some DMA on this device:
> > > 
> > >   if (rev < 0xC4)
> > >           sc->sc_wdcdev.cap |= WDC_CAPABILITY_NO_ATAPI_DMA;
> > > 
> > > i guess it isn't stable or our driver is broken, and this is necessary
> > > for at least now.
> > 
> > actually, this got removed later.
> > 
> > still, this seems like part of the problem.
> 
> the only change i can see that might be related (it appeared in
> openbsd when acer support was re-enabled in their driver):
> 
> *************** pciide_dma_finish(v, channel, drive)
> *** 1066,1073 ****
>       /* stop DMA channel */
>       bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
>           IDEDMA_CMD + IDEDMA_SCH_OFFSET * channel,
> !         bus_space_read_1(sc->sc_dma_iot, sc->sc_dma_ioh,
> !             IDEDMA_CMD + IDEDMA_SCH_OFFSET * channel) & ~IDEDMA_CMD_START);
>   
>       /* Unload the map of the data buffer */
>   #ifndef __OpenBSD__
> --- 1062,1069 ----
>       /* stop DMA channel */
>       bus_space_write_1(sc->sc_dma_iot, sc->sc_dma_ioh,
>           IDEDMA_CMD + IDEDMA_SCH_OFFSET * channel,
> !         (dma_maps->dma_flags & WDC_DMA_READ) ?
> !         0x00 : IDEDMA_CMD_WRITE);
>   
>       /* Unload the map of the data buffer */
>   #ifndef __OpenBSD__
> 
> 
> manuel, can you comment on this change?
> 
> 
> .mrg.


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