Re: USIII support now largely working - please test!

[Jochen Kunz <jkunz%unixag-kl.fh-kl.de@localhost>]

On Thu, 11 Mar 2010 18:54:23 +1100
matthew green <mrg%eterna.com.au@localhost> wrote:

>    trap type 0x34: cpu 1, pc=100a680 npc=100a684 pstate=0x44820006<PRIV,IE>
> 
> can you find out what PC this?  trap 34 is:
> 
> #define T_ALIGN         0x034   /* (10) address not properly aligned */
It seems to be in pseg_set():
db{1}> exa /i 0x100a680
netbsd:pseg_set+0xa0:   ldxa            [%o4 + %g0] 20, %o5

A bit more around the address:
db{1}> exa/i pseg_set+0x90,8 
netbsd:pseg_set+0x90:   srlx            %o1, 13, %o5
netbsd:pseg_set+0x94:   and             %o5, 0x3ff, %o5
netbsd:pseg_set+0x98:   sll             %o5, 0x3, %o5
netbsd:pseg_set+0x9c:   add             %o5, %o4, %o4
netbsd:pseg_set+0xa0:   ldxa            [%o4 + %g0] 20, %o5
netbsd:pseg_set+0xa4:   stwa            %o2, [%o4 + %g0] 20
netbsd:pseg_set+0xa8:   sethi           %hi(0x1000), %g5
netbsd:pseg_set+0xac:   xor             %o2, %o5, %o3

There are three srlx instructions in pseg_set() and the srlx in questin
is the third.

> V240 is USIIIi, right?
Yes:
cpu0 at mainbus0: SUNW,UltraSPARC-IIIi @ 1002 MHz, UPA id 0
cpu0: 128K instruction (32 b/l), 256K data (32 b/l), 4096K external (64
b/l) cpu1 at mainbus0: SUNW,UltraSPARC-IIIi @ 1002 MHz, UPA id 1
cpu1: 128K instruction (32 b/l), 256K data (32 b/l), 4096K external (64
b/l)

> there's a bug with USIIIi PCI i'm chasing,
> but i've seen my real USIII machine die twice with a similar problem
> but not near that PC.  yours is low in locore, which starts at
> 0x100.0000... hopefully we can get these final stability issues
> figured out in time for netbsd 6.  :)
I hope so. I want to use that machine as my main NetBSD playground. :-)
-- 


tschüß,
       Jochen

Homepage: http://www.unixag-kl.fh-kl.de/~jkunz/