Re: Performance instrumentation registers

[Eduardo Horvath <eeh%NetBSD.org@localhost>]

On Thu, 13 Aug 2009, raymond.meyer%rambler.ru@localhost wrote:

> On UltraSPARC II there are 2 performance instrumentation registers:
> 
> Performance Control Register (PCR), and
> Performance Instrumentation Counter (PIC)
> 
> PIC is a 64-bit register, divided into two 32-bit counters D1 and D0.
> Issuing the following assembly instruction aborts the program with
> 'Illegal instruction':
> 
>       rd %pic, %l0
> 
> So I think the PRIV bit in PCR register is set to 1, which forbids
> userland access to PIC register. Any ideas how I can unset that bid? Do
> I need to hack NetBSD kernel or there is a way to load a small program
> in kernel space to unset the bit?

The PRIV bit means you're running in supervisor mode so it needs to be 
done in the kernel.  

What you can do is create a special trap handler that just reads the it 
into a window register and does a done, then write userland code that does 
ta #mytrap and presto you have the value.  Assuming it doesn't interfere 
with what you're measuring.

Trying to run userland with the PRIV is unlikely to work since you will 
get confusion between the user and kernel address spaces, which on sparc64 
are overlapping.

Eduardo