Subject: Re: SMP status
To: Martin Husemann <firstname.lastname@example.org>
From: Chris Ross <email@example.com>
Date: 08/27/2007 14:04:26
On Aug 27, 2007, at 13:03, Martin Husemann wrote:
> That is due to the missing tick interupt on cpu1 (I'm working on it)
>> 'halt' hung after stopping
>> cpu0, didn't drop back to OF.
> I see that too, seems we need to bounce cpu_reboot() to run on cpu0
> so we exit to OF with the bootsrap cpu (currently we halt all other
> and exit to OF with whatever cpu happens to run cpu_reboot).
Similar to matthew green, I note that the sparc port is able to
drop with whatever the running CPU is. I've had my quad-sparc drop
to OBP with a variety of CPUs being the active one.
Perhaps this is something worth not worrying about until the ticks
are working properly on the non-0 CPUs, as that might be related to the