>>> "Michael K. Sanders" <msanders@confusion.net> wrote

> Booting with the card inserted still yields the message:
> 
> cbb0 at pci3 dev 15 function 0: Texas Instruments PCI1410 PCI-CardBus Bridge (rev. 0x01)
> interrupt_vector: spurious vector 7c3 at pil 13
> cbb0: interrupting at ivec 3

I commited a bit fix for MD part of cardbus support. But I'm not
sure this fix will your help.

I have tested cardbus on sparc64 with this two bridges:

cbb0 at pci0 dev 4 function 0: Ricoh 5C475 PCI-CardBus bridge (rev. 0x80)
cbb1 at pci0 dev 5 function 0: Texas Instruments PCI1410 PCI-CardBus Bridge (rev. 0x01)
cbb0: interrupting at ivec 18
cardslot0 at cbb0 slot 0 flags 0
cardbus0 at cardslot0: bus 1 device 0
pcmcia0 at cardslot0
cbb1: interrupting at ivec 1c
cardslot1 at cbb1 slot 1 flags 0
cardbus1 at cardslot1: bus 2 device 0
pcmcia1 at cardslot1

I did test with wi card again. With cbb0 (Ricoh 5C475) worked, but
with cbb1 (TI PCI1410) not worked (probe is ok, no packet
send/receive). So I guess it's a TI PCI1410 specific problem.

The attached patch brought from FreeBSD seems to fix this
problem. Applying this patch, wi with cbb1 worked well.

If this patch does not fix your problem, I suspect to:
   - sparc64 cardbus support (bus fixup, intr fixup)
   - sparc64 PCI-PCI bridge handling
   - cardbus bridge initialization, etc...

-- Takeshi Nakayama

Index: pccbb.c
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pccbb.c,v
retrieving revision 1.90
diff -u -d -r1.90 pccbb.c
--- pccbb.c	2003/06/19 10:48:58	1.90
+++ pccbb.c	2003/08/29 03:06:25
@@ -304,7 +304,7 @@
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1131), CB_TI113X,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
-	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1250), CB_TI12XX,
+	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1250), CB_TI125X,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1220), CB_TI12XX,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
@@ -312,9 +312,9 @@
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1225), CB_TI12XX,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
-	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1251), CB_TI12XX,
+	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1251), CB_TI125X,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
-	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1251B), CB_TI12XX,
+	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1251B), CB_TI125X,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1211), CB_TI12XX,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
@@ -322,7 +322,7 @@
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1420), CB_TI12XX,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
-	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1450), CB_TI12XX,
+	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1450), CB_TI125X, /* XXX? */
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
 	{ MAKEID(PCI_VENDOR_TI, PCI_PRODUCT_TI_PCI1451), CB_TI12XX,
 	    PCCBB_PCMCIA_IO_RELOC | PCCBB_PCMCIA_MEM_32},
@@ -824,6 +824,36 @@
 		break;
 
 	case CB_TI12XX:
+		/*
+		 * Some TI 12xx (and [14][45]xx) based pci cards
+		 * sometimes have issues with the MFUNC register not
+		 * being initialized due to a bad EEPROM on board.
+		 * Laptops that this matters on have this register
+		 * properly initialized.
+		 *
+		 * The TI125X parts have a different register.
+		 */
+		reg = pci_conf_read(pc, tag, PCI_MFUNC);
+		if (reg == 0) {
+			reg &= ~PCI12XX_MFUNC_PIN0;
+			reg |= PCI12XX_MFUNC_PIN0_INTA;
+			if ((pci_conf_read(pc, tag, PCI_SYSCTRL) &
+			     PCI12XX_SYSCTRL_INTRTIE) == 0) {
+				reg &= ~PCI12XX_MFUNC_PIN1;
+				reg |= PCI12XX_MFUNC_PIN1_INTB;
+			}
+			pci_conf_write(pc, tag, PCI_MFUNC, reg);
+		}
+		/* fallthrough */
+
+	case CB_TI125X:
+		/*
+		 * Disable zoom video.  Some machines initialize this
+		 * improperly and exerpience has shown that this helps
+		 * on some machines.
+		 */
+		pci_conf_write(pc, tag, PCI_MMCTRL, 0);
+
 		reg = pci_conf_read(pc, tag, PCI_SYSCTRL);
 		reg |= PCI12XX_SYSCTRL_VCCPROT;
 		pci_conf_write(pc, tag, PCI_SYSCTRL, reg);
Index: pccbbreg.h
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pccbbreg.h,v
retrieving revision 1.7
diff -u -d -r1.7 pccbbreg.h
--- pccbbreg.h	2001/08/30 09:20:18	1.7
+++ pccbbreg.h	2003/08/29 03:06:25
@@ -40,6 +40,8 @@
 #define PCI_BCR_INTR 0x3C	/* intr line, intr pin, bridge control regs */
 #define PCI_LEGACY 0x44		/* legacy IO register address (32 bits) */
 #define	PCI_SYSCTRL 0x80	/* System control */
+#define	PCI_MMCTRL 0x84		/* MMCTRL */
+#define	PCI_MFUNC 0x8c		/* MFUNC */
 #define PCI_CBCTRL 0x90		/* Retry status, Card ctrl, Device ctrl */
 
 #define PCI_CLASS_INTERFACE_MASK  0xffffff00
@@ -96,6 +98,7 @@
 #define PCI113X_CBCTRL_INTR_DET 0x0100 /* functional interrupt detect */
 
 /*  PCI_CBCTRL bits for TI PCI12XX */
+#define PCI12XX_SYSCTRL_INTRTIE		0x20000000
 #define PCI12XX_SYSCTRL_VCCPROT		0x200000
 #define PCI12XX_SYSCTRL_PWRSAVE		0x000040
 #define PCI12XX_SYSCTRL_SUBSYSRW	0x000020
@@ -103,6 +106,10 @@
 #define PCI12XX_SYSCTRL_CDMA_EN		0x000008
 #define PCI12XX_SYSCTRL_KEEPCLK		0x000002
 #define PCI12XX_SYSCTRL_RIMUX		0x000001
+#define PCI12XX_MFUNC_PIN0		0x0000000f
+#define PCI12XX_MFUNC_PIN0_INTA		0x02
+#define PCI12XX_MFUNC_PIN1		0x000000f0
+#define PCI12XX_MFUNC_PIN1_INTB		0x20
 #define PCI12XX_CBCTRL_CSC		0x20000000u
 #define PCI12XX_CBCTRL_ASYNC_CSC	0x01000000u
 #define PCI12XX_CBCTRL_INT_SERIAL	0x060000
Index: pccbbvar.h
===================================================================
RCS file: /cvsroot/src/sys/dev/pci/pccbbvar.h,v
retrieving revision 1.19
diff -u -d -r1.19 pccbbvar.h
--- pccbbvar.h	2003/03/22 06:25:15	1.19
+++ pccbbvar.h	2003/08/29 03:06:25
@@ -43,19 +43,20 @@
 /* Chipset ID */
 #define	CB_UNKNOWN	0	/* NOT Cardbus-PCI bridge */
 #define	CB_TI113X	1	/* TI PCI1130/1131 */
-#define	CB_TI12XX	2	/* TI PCI1250/1220 */
-#define	CB_RX5C47X	3	/* RICOH RX5C475/476/477 */
-#define	CB_RX5C46X	4	/* RICOH RX5C465/466/467 */
-#define	CB_TOPIC95	5	/* Toshiba ToPIC95 */
-#define	CB_TOPIC95B	6	/* Toshiba ToPIC95B */
-#define	CB_TOPIC97	7	/* Toshiba ToPIC97 */
-#define	CB_CIRRUS	8	/* Cirrus Logic CL-PD683X */
-#define	CB_CHIPS_LAST	9	/* Sentinel */
+#define	CB_TI12XX	2	/* TI PCI1220 */
+#define	CB_TI125X	3	/* TI PCI1250 */
+#define	CB_RX5C47X	4	/* RICOH RX5C475/476/477 */
+#define	CB_RX5C46X	5	/* RICOH RX5C465/466/467 */
+#define	CB_TOPIC95	6	/* Toshiba ToPIC95 */
+#define	CB_TOPIC95B	7	/* Toshiba ToPIC95B */
+#define	CB_TOPIC97	8	/* Toshiba ToPIC97 */
+#define	CB_CIRRUS	9	/* Cirrus Logic CL-PD683X */
+#define	CB_CHIPS_LAST	10	/* Sentinel */
 
 #if 0
 static char *cb_chipset_name[CB_CHIPS_LAST] = {
-	"unknown", "TI 113X", "TI 12XX", "RF5C47X", "RF5C46X", "ToPIC95",
-	"ToPIC95B", "ToPIC97", "CL-PD 683X",
+	"unknown", "TI 113X", "TI 12XX", "TI 125X", "RF5C47X", "RF5C46X",
+	"ToPIC95", "ToPIC95B", "ToPIC97", "CL-PD 683X",
 };
 #endif