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Re: Ross 511-6526 mbus modules



Hello,

On Sun, 10 Apr 2016 13:12:49 +1000
matthew green <mrg%eterna.com.au@localhost> wrote:

> McGrude writes:
> > I've acquired two Ross 511-6526 mbus modules.  These are each dual cpu
> > cache-less mbus modules.   The page here
> > https://www.netbsd.org/ports/sparc/faq.html#smp-cpus states I'll run
> > into problems running two of these in one system with zero cache.
> > Is there any way around that limitation?
> > 
> > I am successfully running one in a sparc20, but would like to add the
> > second one if it were possible.
> 
> afaict, these CPUs have 512KB cache each?

These are 2x 125MHz HyperSPARC-B IIRC, with no L1 data caches but 256kB
L2 each.

> try it and see.  check for heat issues when you're using them -- four
> of these in one box does generate a lot of heat.
> 
> what does netbsd show in dmesg currently?

Last time I checked SMP on HyperSPARCs still crashed under (heavy)
load :/

have fun
Michael


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