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re: partially working SMP again



   On Sat, May 30, 2009 at 06:44:16AM +1000, matthew green wrote:
   > 
   > OK, now i think you're having issues with the cache congruency
   > issue.
   
   Isn't that backwards?
   I thought cache conguency was a problem when the same physical
   memory was mapped to different virtual addresses.
   Surely here we are tring to make the same virtaul address reference
   different physical memory on each cpu.
   Or is the problem in the shared accesses used to setup these pages?

the problem is that the global mapping and the local mapping for
this cpu need to be cache congruent.  ie, for tsutsui's case,
with CPUINFO_VA 0xf0002000 (always), the other mappin for this
cpu needs to be on a 512KB + 0x2000 byte alignment.  for my case
i think it only needs 32KB + 0x2000, due to this only being
relevant for the non-ecache systems.

see alloc_cpuinfo_global_va() in a netbsd-4 tree.
   
   Maybe the setting the cpu to TSO might hide some store-buffer issues?

this is not v9.


.mrg.


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