Disabling 2nd level cache on mbus cpus?

[Hauke Fath <hf%spg.tu-darmstadt.de@localhost>]

Hi,

since I seem to have hardware issues with my pair of SM71 cpus - is 
there an easy way to disable the 2nd level caches?

Otherwise, plan B would be a single SM50 (I have a second one around, 
but sparc/35363 applies to netbsd-4 still) - ouch.

        hauke

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