On Tue, Jan 02, 2007 at 01:43:49AM -0600, Johan A.van Zanten wrote:
>  After that I'll open a PR unless anyone has any thoughts otherwise.

I finally got around to digging out my spare SS20 and replacing its pair of
SM81-2s with a pair of SM50s (50Mhz SuperSPARC, no L2 cache). Things weren't
good, even with it's existing 3.0 install with an MP kernel - I got random
segfaults, but the machine was still "usable" (for small values of usable).

After upgrading to 3.1 and installing the 3.1 MP kernel, pretty much
everything segfaulted at bootup. Pulling one of the CPUs gave me a stable
system again (no segfaults, etc). The 3.1 release I used was the one
released by releng (ie no non-standard compiler flags, etc).

Banner:
SPARCstation 20 MP (2 X 390Z50), No Keyboard
ROM Rev. 2.22, 192 MB memory installed, Serial #7536178.
Ethernet address 8:0:20:72:fe:32, Host ID: 7272fe32.

CPUs:
cpu0 at mainbus0: mid 8: TMS390Z50 v0 or TMS390Z55 @ 50 MHz, on-chip FPU
cpu0: physical 20K instruction (64 b/l), 16K data (32 b/l): cache enabled
cpu1 at mainbus0: mid 10: TMS390Z50 v0 or TMS390Z55 @ 50 MHz, on-chip FPU
cpu1: physical 20K instruction (64 b/l), 16K data (32 b/l): cache enabled

As mentioned previously, I'm running a pair of machines with two SM61s each
and both are rock solid, both with 3.0 and 3.1. I haven't used the two SM50
CPUs mentioned above for a while, but they were stable together in an MP
system running 2.0x. Looks like a regression between 2.0 and 3.0, at least
for SuperSPARC CPU systems with no L2 cache.

-mj
-- 
Michael-John Turner | http://mjturner.net/
mj@turner.org.za    | Open Source in WC ZA - http://www.clug.org.za/