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On 2005.10.07 10:06:54 +0000, Bruce O'Neel wrote:
| Hi,
|=20
| Sorry this isn't a true followup.  Back around 5/9 through 9/9 there
| was chatter about Bad pAUX_base and which systems this occured on.  I
| finally got the time and put a 60mhz SuperSparc in a SS20 and did a
| build.sh run.  3 days later and we don't have any cores nor Bad
| pAUX_base messages in the build log.
|=20
| So, the current status seems to be:
|=20
| - MicroSparc IIs @ 110mhz in SS4 and SS5 system.  Yes, you get it.
| (me SS4, Laurent FAILLIE SS5)
|=20
| - SparcBook and Krups with basically the same CPUs, yes. (Michael)
|=20
| - Dual Supersparc @ 50mhz in a SS20.  Yes, so often that it is
| unusable. (Rui Paulo)
|=20
| - Tri hypersparc @ different mhz in a SS20.  I've never seen it.  I've
| also not seen it with assorted other hypersparc combos that I've run
| over time.  They all have been rock solid. (me)
|=20
| - Single supersparc @ 60mhz in a SS20, seems not. (me)
|=20
| - one has to assume that some other types of systems are ok otherwise
| there would be more chatter about this.
|=20
| Is it the level 2 cache? (I'm frowning but you can't see that) The
| microsparc IIs don't have it.  My hypersparcs do, and so does my
| supersparc.
|=20
| Rui Paulo, according the the snippet of your dmesg, your 50mhz CPUs
| don't.  What exact part numbers are they?
|=20
| According to http://mbus.sunhelp.org/modules/index.htm the 501-2568,
| 501-2712, 501-2528, and 501-2708 are up to 50 mhz but have no cache.
| Is this what you have?

Not quite. I believe I have some form of 501-2708, but made by TI
(Texas Instruments).
Phisycally, they are very similar to the 501-2708.

I'm not sure this has something to do with the cache or not, but I
haven't looked at this problem recently, so something may have changed.

		-- Rui Paulo

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