I got myself one of those 160MHz TurboSparc upgrade modules for my
SparcStation 5. Everything works but when booting the machine only
shows:

cpu0 at mainbus0: DVMA coherent : MB86907 @ 161 MHz, on-chip FPU
cpu0: 16K instruction (32 b/l), 16K data (32 b/l): cache enabled

Well according to the documentation that came with the CPU and
information shown when booting the machine (openboot displays that
512KB cache enabled) the upgrade module should have 512KB of cache.
Googling for the 170MHz SS5 shows dmesg:

cpu0 at mainbus0: DVMA coherent : MB86907 @ 170 MHz, on-chip FPU
cpu0: 16K instruction (32 b/l), 16K data (32 b/l), 512K external (32
b/l): cache enabled

Well there you can see 512K clearly. Is this cache on the 160MHz
upgarde module used and not displayed during boot time or not used?

Olev