Subject: re: Incorrect cache sizes displayed for HyperSparc Modules in odd configurations
To: Tim Preston <tim@flibble.org>
From: matthew green <mrg@eterna.com.au>
List: port-sparc
Date: 09/16/2004 07:44:19 
i believe this is a hardware issue.  swap the cpus around so that
the bigger caches are "first", and then it works.  i have a 3 cpu
ss10 with 2 hs100/256k's and a hs150/512k module that only worked
after i swapped their locations, as suggested by paul kranenburg
when he originally commited the support for mismatched cache
sizes.



.mrg.