On Mon, Mar 31, 2003 at 10:36:25AM +0930, Brett Lymn wrote:
> On Sun, Mar 30, 2003 at 06:33:55PM -0600, Josh Paetzel wrote:
> > 
> > So, I have two questions:  1) Is my system in fact only utilizing
> > one CPU, 
> >
> 
> Yes, you are only utilising one cpu - you need to compile and install
> a MP kernel.

Yeah, I caught that one.  I'll pass out pointy hats for it later.

> 
> > 2) Which of the web-resources is correct?  Is there a chance for me to get 
> > this thing to boot SMP or not?
> > 
> 
> Both are correct - sparc SMP does work with mbus modules, it is just
> that the Hypersparc ones have issues due to how their caches work.  If
> you go back through the port-sparc archives there is a message from
> mrg that tells you how to turn off the caches on the hypersparcs which
> makes the machine run stably but you take a performance hit.  There
> are some other patches there from me that try to make the cache
> flushing work but, last I tried, they are not complete.
> 
> -- 
> Brett Lymn

So any thoughts on what would give me better performance, 1 cpu with cache 
enabled or 2 cpus without cache?  The box is going to be used as a headless 
web/mail server with fairly low loads on it.

Thanks again, 

Josh Paetzel