Hi,
while still trying to solve the sun4c core dump problem,
I had a look at the cache flush routines.
First I noticed that for the software cache our routines are much smaller
than the ones used by linux. It may just be that in linux the loop is unrolled
(the linux ones are assembly routines, and I don't know sparc assembly).

I also noticed that bus_dmamap_sync() are no-op. The cache is write through,
so it should be OK for memory->device, but will the cache data be properly
invalidated in the device->memory case ?

-- 
Manuel Bouyer <bouyer@antioche.eu.org>
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