On Sat, 16 Mar 2002, Andy Ball wrote:

> Hello Geoff!

Hi fellow amateur,

> 
>   GB> Do you mean that the data is valid at the +ve clock transition
>     > and (next byte) at the -ve transition? OK I know that the data
>     > is NRZ so I suppose that this is practical, just requires a
>     > phase skew between clock & data :-)
> 
> Surely there's always going to be one (so the data lines are settled
> before they're clocked into the destination), DTC just uses both edges
> for separate sets of data (I think). It's a technique that seems to be
> cropping up in a number of places (VMEbus etc).

Well without +ve and -ve edge triggered DAV reads, the clock data
(read strobes) has to be twice the data rate.

>   GB> That's what cache's are for :-)
> 
> To some extent yes, but the read caches can only fill as quickly as
> data can fly under the head.

True, but it has something to do with writes (I have just installed an
new CDRW!)
> 
>   GB> Can you imagine what such signals do to the RF spectrum :-(
> 
> Sadly yes - (73 DE KB9YLW ;-)

I live in an urban area - seems every house has a PC that radiates an
a TV that does likewise!

73 de Geoff
-- 
    Geoff Blake	              Please reply to:		Using Linux on  
    Chelmsford		geoff (a) palaemon . co . uk	Intel & NetBSD 
    Essex UK		  geoff @ g8gnz . ampr.org	 on Sun Sparc

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