Subject: Re: 1.5S vs sparc/MP
To: None <pk@cs.few.eur.nl>
From: Simon J. Gerraty <sjg@quick.com.au>
List: port-sparc
Date: 03/02/2001 00:44:50
Ok, so if I turn off the printf's in sema_*() we go to sleep when we
shouldn't.   But if I use sema_spinwait(), (on previous runs) it locks
up too.  I'll give it another try in a sec.

Is there a way to know from smp_cache_flush() if sleeping is ok?
Eg. by looking at curproc?

FWIW I was able to break into ddb, so we see:

qec0 at sbus0 slot 2 offset 0x20000 level 4 (ipl 7): 128K memory
qe0 at qec0 slot 0 offset 0x0 rev 1 address 08:00:20:72:58:20
qe1 at qec0 slot 1 offset 0x0 rev 1 address 08:00:20:72:58:20
qe2 at qec0 slot 2 offset 0x0 rev 1 address 08:00:20:72:58:20
qe3 at qec0 slot 3 offset 0x0 rev 1 address 08:00:20:72:58:20
eccmemctl0 at mainbus0: version 0x0/0x2
scsibus0: waiting 2 seconds for devices to settle...
probe(esp0:0:0): esp0: timed out [ecb 0xf07a4000 (flags 0x1, dleft 0, stat 0)], <state 2, nexus 0xf07a4000, phase(l 0, c 0, p 101), resid 0, msg(q 0,o 0) >
probe(esp0:0:0): esp0: timed out [ecb 0xf07a4000 (flags 0x41, dleft 0, stat 0)], <state 2, nexus 0xf07a4000, phase(l 0, c 0, p 101), resid 0, msg(q 0,o 0) > AGAIN
esp0: SCSI bus reset
[BREAK]
Stopped at      cpu_Debugger+0x4:       jmpl            [%o7 + 0x8], %g0
db{0}> trace
zsc_intr_hard(0x8, 0xf0781ed0, 0xf024dc00, 0x90, 0xffff, 0xa00) at zsc_intr_hard
+0x68
zshard(0x0, 0xf01a52a0, 0x0, 0xf00, 0xf0002000, 0xf0028f88) at zshard+0x40
sparc_interrupt44c(0x1e9010e3, 0xf0293800, 0xfe000004, 0x0, 0xf0002000, 0xf00020
00) at sparc_interrupt44c+0x120
mi_switch(0xf0291c28, 0x2, 0xf024bca8, 0xf0293b50, 0xf0257300, 0xdeadbeef) at mi
_switch+0x1cc
ltsleep(0x0, 0x210, 0xf0230890, 0x0, 0xf02b123c, 0xa) at ltsleep+0x2b0
sema_wait(0xf02b123c, 0x4, 0xf6242000, 0xf0002000, 0x40, 0x16) at sema_wait+0x84

cache_sema_wait(0x2, 0xf0781fa0, 0x500, 0xf6242000, 0xf62421f0, 0x2) at cache_se
ma_wait+0x38
smp_cache_flush(0xf07a4016, 0x7, 0x1000, 0xf01d4254, 0xf024d2ec, 0xf024d2e8) at s
mp_cache_flush+0x104
iommu_dmamap_load(0x1000, 0xf0798d80, 0xf07a4016, 0x7, 0x0, 0x1) at iommu_dmamap
_load+0x48
lsi64854_setup(0xf0786a00, 0xf079c2f4, 0xf079c2f8, 0x0, 0xf024d42c, 0xf0028f88) a
t lsi64854_setup+0x100
esp_dma_setup(0xf079c000, 0xf079c2f4, 0xf079c2f8, 0x0, 0xf024d42c, 0x3e8) at esp
_dma_setup+0x18
ncr53c9x_select(0xf079c000, 0xf07a4000, 0x0, 0x1, 0xdeadbeef, 0xdeadbeef) at ncr
53c9x_select+0x4a4
ncr53c9x_sched(0xf079c000, 0xf024f000, 0x0, 0x6, 0x0, 0xa) at ncr53c9x_sched+0x3
d0
ncr53c9x_scsi_cmd(0xf07a3000, 0x1c4, 0xf00216e8, 0xf024f1b4, 0x0, 0x100) at ncr5
3c9x_scsi_cmd+0x270
scsipi_execute_xs(0xf07a3000, 0x0, 0x0, 0xf07a3088, 0xf0291c00, 0xc9) at scsipi_
execute_xs+0x34
scsi_scsipi_cmd(0xf0786600, 0xf07a3000, 0x6, 0x0, 0x0, 0x4) at scsi_scsipi_cmd+0
x130
scsipi_command(0xf0786600, 0xf024d6c0, 0x6, 0x0, 0x0, 0x4) at scsipi_command+0x8
4
scsipi_test_unit_ready(0xf0786600, 0x1c4, 0x4c, 0xf025b6a0, 0x0, 0xf0002000) at s
csipi_test_unit_ready+0x4c
scsi_probedev(0x0, 0x0, 0x0, 0x0, 0xf0291c28, 0xf0021a94) at scsi_probedev+0x70
scsi_probe_bus(0xf0798d40, 0x0, 0x0, 0xc8, 0x0, 0xf02b0c00) at scsi_probe_bus+0x
138
scsibus_config_interrupts(0xf0798d40, 0x0, 0xf01bf05c, 0xfffffff6, 0x0, 0xa) at s
csibus_config_interrupts+0x48
config_process_deferred(0xf0294100, 0x0, 0xf0294000, 0xffffffff, 0x0, 0xf0208ba0
) at config_process_deferred+0x58
configure(0xf02af000, 0xf02af000, 0xf02af000, 0xf02ad800, 0x1, 0x10000000) at co
nfigure+0x5c
main(0x0, 0xfffffff8, 0xf0002208, 0xf024db6b, 0x38b8ac, 0x276550) at main+0x3e0
startmap_done(0x388110, 0x3950a0, 0x387eb4, 0x0, 0x397400, 0xffffffff) at startm
ap_done+0x12c
db{0}>