Subject: Re: pc-card sbus cards (nell) (was Re: sbud FDDI cards revisited)
To: Darren Reed <darrenr@reed.wattle.id.au>
From: Sean Berry <berry@housebsd.org>
List: port-sparc
Date: 08/26/2000 02:01:36
On Sat, 26 Aug 2000, Darren Reed wrote:

> 
> In an email from David Evans <dfevans@bbcr.uwaterloo.ca>, sie wrote:
> > On Wed, Aug 23, 2000 at 11:54:44PM +0000, Sean Berry wrote:
> > > 
> > > I've recently acquired several sbus PC-Card cages (nell) (FCC ID GVWNELL),
> > > looks like part number 270-2367-02 rev 02.  My goal is to wire up Lucent
> > > wavelan cards in any-to-any mode and have cheapo wireless base-stations.
> > > 
> > 
> >   I was going to do the exact same thing.  I found a guy with the cages for
> > $45 US or so; I procrastinated.
> >   I asked about this in March or so; there might be some info in the archives.
> 
> I've got an SS2 with one of those in it, with NetBSD installed.
> 
> If I plug a card in, it panics.
> 
> If I eject a card, it panics.

Are you plugging stuff into the top port?  All the nicer things I plug
into it -don't- panic if I plug them into the bottom port.  :)  dmesg on
that box (very nice)

NetBSD escort$ /sbin/dmesg
NetBSD 1.4.2 (ESCORT) #1: Thu Aug 24 01:01:35 GMT 2000
    berry@escort:/usr/src/sys/arch/sparc/compile/ESCORT
real mem = 133505024
avail mem = 120995840
using 1629 buffers containing 6672384 bytes of memory
bootpath: /iommu@f,e0000000/sbus@f,e0001000/espdma@f,400000/esp@f,800000/sd@1,0
mainbus0 (root): SUNW,SPARCstation-10
cpu0 at mainbus0: TMS390Z50 v0 or TMS390Z55 @ 50 MHz, on-chip FPU
cpu0: physical 20K instruction (64 b/l), 16K data (32 b/l), 1024K external
(32 b/l): cache enabled
obio0 at mainbus0
clock0 at obio0 slot 0 offset 0x200000: mk48t08 (eeprom)
timer0 at obio0 slot 0 offset 0x300000 delay constant 23
zs0 at obio0 slot 0 offset 0x100000 level 12 softpri 6
zstty0 at zs0 channel 0 (console)
zstty1 at zs0 channel 1
zs1 at obio0 slot 0 offset 0x0 level 12 softpri 6
kbd0 at zs1 channel 0
ms0 at zs1 channel 1
fdc0 at obio0 slot 0 offset 0x700000 level 11 softpri 4: chip 82077
fd0 at fdc0 drive 0: 1.44MB 80 cyl, 2 head, 18 sec
auxreg0 at obio0 slot 0 offset 0x800000
power0 at obio0 slot 0 offset 0xa01000 level 2
iommu0 at mainbus0 ioaddr 0xe0000000: version 0x3/0x0, page-size 4096,
range 64MB
sbus0 at iommu0: clock = 20 MHz
dma0 at sbus0 slot 15 offset 0x400000: rev 2
esp0 at dma0 slot 15 offset 0x800000 level 4: ESP200, 40MHz, SCSI ID 7
scsibus0 at esp0: 8 targets, 8 luns per target
probe(esp0:1:0): max sync rate 10.00Mb/s
sd0 at scsibus0 targ 1 lun 0: <SEAGATE, ST11200N SUN1.05, 9500> SCSI2
0/direct fixed
sd0: 1005MB, 1872 cyl, 15 head, 73 sec, 512 bytes/sect x 2059140 sectors
probe(esp0:3:0): max sync rate 10.00Mb/s
sd1 at scsibus0 targ 3 lun 0: <SEAGATE, ST11200N SUN1.05, 9500> SCSI2
0/direct fixed
sd1: 1005MB, 1872 cyl, 15 head, 73 sec, 512 bytes/sect x 2059140 sectors
ledma0 at sbus0 slot 15 offset 0x400010: rev 2
le0 at ledma0 slot 15 offset 0xc00000 level 6: address 08:00:20:18:d8:33
le0: 8 receive buffers, 2 transmit buffers
SUNW,bpp at sbus0 slot 15 offset 0x4800000 level 2 (ipl 3) not configured
SUNW,DBRIe at sbus0 slot 15 offset 0x8010000 level 9 not configured
nell0 at sbus0 slot 0 offset 0x0 level 4 (ipl 7) level 7 (ipl 13)socket[0]
registers:
        ICR0=0
        ICR1=0

ISR0=37074<IOIS16,IOREQ,STSCHG,SPKR,WPCHG,RDYCHG,BVD1CHG,BVD2CHG,CDC
        ISR1=1<REV=1,PCTYPE=0>
socket[1] registers:
        ICR0=0
        ICR1=0

ISR0=37074<IOIS16,IOREQ,STSCHG,SPKR,WPCHG,RDYCHG,BVD1CHG,BVD2CHG,CDC
        ISR1=1<REV=1,PCTYPE=0>
: rev 1
pcmcia0 at nell0 socket 0
stp4020[0]: Battery change 1
stp4020[0]: Battery change 2
stp4020[0]: Ready/Busy change
stp4020[0]: Write protect change
stp4020[1]: Battery change 1
stp4020[1]: Battery change 2
stp4020[1]: Ready/Busy change
stp4020[1]: Write protect change
pcmcia1 at nell0 socket 1
eccmemctl0 at mainbus0: version 0x0/0x1
root on sd0a dumps on sd0b
root file system type: ffs
stp4020[0]: Battery change 2
stray interrupt ipl 0xd pc=0xf0007c1c npc=0xf0007c20 psr=404000c3<S,PS>
stp4020[0]: Battery change 2
stp4020[0]: Ready/Busy change
stp4020[0]: Write protect change
stray interrupt ipl 0xd pc=0xf0007c1c npc=0xf0007c20 psr=404000c3<S,PS>
stray interrupt ipl 0xd pc=0xf0007c2c npc=0xf0007c30 psr=404010c7<EF,S,PS>
stray interrupt ipl 0xd pc=0xf0007c2c npc=0xf0007c30 psr=404010c7<EF,S,PS>
stp4020[0]: Ready/Busy change
stray interrupt ipl 0xd pc=0xf0007c1c npc=0xf0007c20 psr=404000c1<S,PS>
stp4020[0]: Ready/Busy change
stray interrupt ipl 0xd pc=0xf01e1808 npc=0xf01e180c psr=40800ac3<S,PS>

For my wavelan card most recently, I believe.

> NetBSD/sparc is missing a bunch of middle-layer bus_dma stuff that the nell
> driver needs (things like extents, etc).
> 
> I was going to hack on it but when I discovered the reason why it doesn't,
> I punted and filed a PR about the missing interconnect bits.

How much work do you figure it'd take?  I have no problems bribing
people.  :)