Subject: Re: Huge amounts of core dumping from /bin/sh, inetd, whatever...
To: Paul Kranenburg <pk@cs.few.eur.nl>
From: Jim Bernard <jbernard@mines.edu>
List: port-sparc
Date: 06/06/2000 13:13:33
On Tue, Jun 06, 2000 at 07:38:19PM +0200, Paul Kranenburg wrote:
> I've adapted the physical cache flush routines to deal with the
> non-cacheble mappings used in pmap_copy_page() and pmap_zero_page().
> 
> Can folks with non-MCC supersparc modules test a kernel built from
> today's (6/6/2000) sources?  Please mail me the results if anything
> is still amiss.

  OK:  Sources were updated Tue Jun  6 07:53:10 MDT 2000 (13:53 UTC), and
included:

  cache.c,v 1.51 2000/06/05 20:38:24 pk
  cpu.c,v 1.104 2000/06/05 20:38:25 pk
  pmap.c,v 1.168 2000/06/06 09:20:31 pk

The kernel still results in dying binaries.  I didn't see any trouble in
brief testing in single-user mode, but it didn't succeed in coming up multiuser
because /bin/sh died, apparently at the beginning of processing /etc/rc.  I
did have MULTIPROCESSOR defined.  A kernel built from the same set of sources
and the same config file, but with vm_page_zero_enable = FALSE
(in sys/uvm/uvm_page.c) appears to work fine.

  If there are any tests you'd like me to do, please let me know.  dmesg for
this system from a March 19 (1.4V) kernel includes:

total memory = 31980 KB
avail memory = 27060 KB
using 425 buffers containing 1700 KB of memory
bootpath: /iommu@f,e0000000/sbus@f,e0001000/espdma@f,400000/esp@f,800000/sd@0,0
mainbus0 (root): SUNW,SPARCstation-20
cpu0 at mainbus0: TMS390Z50 v0 or TMS390Z55 @ 50 MHz, on-chip FPU
cpu0: physical 20K instruction (64 b/l), 16K data (32 b/l): cache enabled
cpu at mainbus0 not configured

--Jim