Eduardo E. Horvath <eeh@one-o.com> wrote

> I'm planning on switching the sparc64 port over to a new interface:
>
> void send_softint __P((int cpu, int level, struct intrhand *handler));
>
> cpu is the CPU number, -1 is this CPU, and -2 is any CPU.
> level is the numerical interrupt level, 1..15.
> handler is a ponter to the intrhand structure to be queued.  If
>        it's NULL then an interrupt is generated but no particular
>        vector is set and the dispatcher must poll all interrupt
>        handlers at that level until one claims the interrupt.
>
> This should reduce the overhead in interrupt dispatch since the
> dispatcher will not have to traverse a linked list and poll each of
> the different interrupt handlers to see which one the interrupt
> belongs to.

This is rather interesting in respect to having MI SMP framework
common across various NetBSD ports.

I have been thinking around how IPI (inter-processor interrupt)
notification can be organized, specifically for NetBSD/luna88k and MP
NetBSD/arc.  Isn't it better to continue the discussion in tech-smp? 

Tohru Nishimura
Nara Institute of Science and Technology