Subject: Re: High serial port (output) speeds
To: Dave McGuire <mcguire@neurotica.com>
From: Bill Studenmund <wrstuden@nas.nasa.gov>
List: port-sparc
Date: 10/23/1999 18:12:02
On Sat, 23 Oct 1999, Dave McGuire wrote:

> On Sat, 23 Oct 1999, der Mouse wrote:
> >Of course, all of this is predicated on the Sun PCLK frequency of
> >4.9152MHz.  The Z8530 can, I imagine, do either speed without any
> >trouble at all if you feed it an appropriate clock frequency.
> 
>   The Z8530 is good for 1mbit per channel...but of course, as you say, it's a
> matter of feeding it the right clocks.

Right. That's the whole problem with 1x; the receiver is not using the
same clock as the transmitter. Even if both chips are running at the same
clock rate, it's not the same clock - there's no circuitry in these
computers to synchronize them.

Given that, there's nothing to prevent the time when the transmitter is
changing the data from coinciding with the time when the receiver is
sampling it. If you (that's a general you) don't get this, sit and think
about it. This problem is what's wrong with just using 1x mode as der
Mouse suggested.

1x mode will certainly work for a while. But it won't work for a long-term
reliable link. Say the clocks differ by just 1 Hertz (one part in almost 5
million). Then once a second one clock will get ahead of the other by one
cycle. Say we're shooting for around 115200 bits per second (bps). We'll
probably get 111709 bps. That's dividing by 11. In this case, once every
eleven seconds, one clock slips ahead of the other by a cycle. At some
point in this slippage, the receiver will be sampling right when the
transmitter is changing its output. Who knows what will get through at
that point. :-)

To quote the _SCC_User's_Manual_, Zilog document DC-8293-02, page 4-6,
"The SCC may be programmed to accept a receive clock that is one, sixteen,
thirty-two, or sixty-four times the data rate. ... The 1X mode is used
when bit synchronization external to the received clock is present (i.e.,
the clock recovery circuit, or active receive clock from the sender
side)."

I've been told that the Sparc serial ports have some sort of external
clock support. Like one of the RS-232 pins is hooked to RTxC on the chip.
If that's so, then all the sparc needs to do is gain some external clock
source support. Both mac drivers for this chip have it (I wrote it based
on the atari's multiple clock source code); it's not hard. Then just have
the computer lock to the external clock source. Thsi would make
higher-speed modems work right now (especially ones at 57600, 115200, and
so on,  speeds 1X eon't really get).

From looking at a web page on Sun serial ports, at
http://www.stokely.com/unix.serial.port.resources/A-B-Ycablepinout.html ,
all the listed serial ports support an external receive clock Some (listed
as the Sparcstation 4, 5, 10, 20, LX, and Ultra Enterprise) support
Transmit Clocks, though I don't understand the "DTE source" & "DCE source"
designations.

If we could figure out how to turn that on, when linking one sparc to
another, we set one to feed out a serial clock, and the other would use it
as its data clock. Then whatever rate you choose would be rock solid
(modulo interrupt issues..).

Take care,

Bill