> > 
> > I'd wonder about the performance of using ASI's....
> 
> Should be faster since they explicitly bypass the MMU and don't take TLB
> miss traps.  However, the current scheme using gcc macros is not optimal
> since gcc can't do as good a job at scheduling the instructions.  The best
> solution would be to modify gcc so pointers could be explicitly assocated
> with ASIs.


Yes, somebody else mentioned bypassing the MMU. Now, I'm far from
knowledgeable of recent Sun internal hardware but does the ASI also bypass
any buffered write hardware? It used to be part of the Comet axioms that
you could have an arbitrary number of write buffers between a CPU and the
device and that you wouldn't necessarily stall until you tried to read the
same location.

-matt