> mainbus0 (root): Sun 4/20
> cpu0 at mainbus0: MB86900/1A or L64801 @ 20 MHz, WTL3170/2 FPU
> cpu0: 64K byte write-through, 16 bytes/line, sw flush: cache enabled
> memreg0 at mainbus0 ioaddr 0x
> 
> Is the cache what's causing the lockup? If so, can I either disable it
> or replace it?

George,

        Out of sheer boardem, i've decided to tackel your problem from
the kernel side. I've been reading through the sparc kernel source,
and have discovered where the boot code turns on the cache (and
prints out 'cache enabled.'). I commented it out of the startup code,
and am compiling a kernel right now on my ELC.

Hopefully, what will happen is that it will detect the cache 
(print 4K byte write-through, 16 bytes/line, sw flush:) but not
enable it. 

I've only got 16mb of RAM in my ELC, and its netbooting, so I think
the kenrel will be done baking tomorrow morning (3:12am and nothing
to do :)).

I'll send you a gziped copy of the kernel for you to try. Hopefully,
when it boots on my ELC, it will not enable the cache either
(as a test).

See you in the morning,

        Nate