I was looking thru the linux code to see how they handle this
(as far as I can tell, they don't use the level 14 timer),
when a solution occured to me that should make everyone happy:
lower processor IPL during processing of level 14 interrupts to level 10.
all the interrupts between those levels don't modify process state
(the floppy, zs and audio drivers all have two-level interrupt schemes),
so all we have to deal with is another level 14 interrupt coming in
before we're done processing the first one (which seems really unlikely
but is easy enough to deal with).  this allows us to use both timers
while keeping zs interrupt latency low.  then we'd just need to define
a new spl level for "the lowest priority that it's safe to run statclock()"
(or something like that) and change the various splhigh()s that
I mentioned before to use the new spl, which would be level 10 on the sparc
and could start out as splhigh() on other platforms.

comments?

-Chuck