Subject: Re: HyperSPARC
To: Erik E. Fair <fair@clock.org>
From: Brian Baird <brb@brig.com>
List: port-sparc
Date: 08/13/1997 23:17:40
> Paul commited some changes for the kernel a few days ago, has anyone had a
> chance to test them yet?

At least some of those changes came from me, although my version is
marginally different in some messages.  I have a sparc 10 with dual
RT625 hypersparcs. With what's there a kernel will boot and recognise
devices.  In order to have the le ethernet work, you need to disable
sc->sc_hasiocache in iommu.c.  In order to even get through the boot
code you need to turn off the cpu's instruction buffer from the prom:
	ok reset
	ok ross625
	ok ibuf-off
	ok boot netbsd -s
The other wierd thing is that the -s flag in the above command is
copied into init (you can see it with a DEBUG kernel) but is promptly
ignored.

NetBSD 1.2G (DALEK) #9: Wed Aug  6 21:58:05 PDT 1997
    root@dalek:/usr/src/sys/arch/sparc/compile/DALEK
real mem = 100106240
avail mem = 93089792
using 768 buffers containing 3145728 bytes of memory
bootpath: /iommu@f,e0000000/sbus@f,e0001000/espdma@f,400000/esp@f,800000/sd@1,0
mainbus0 (root): SUNW,SPARCstation-10
cpu0 at mainbus0: RT625/626 @ 125 MHz, on-chip FPU
cpu0: 256K write-back cache (64 bytes/line), sw flush cache enabled
cpu at mainbus0 not configured
obio0 at mainbus0
clock0 at obio0 addr 0xf1200000: mk48t08 (eeprom)
timer0 at obio0 addr 0xf1300000 delay constant 39
zs0 at obio0 addr 0xf1100000 pri 12, softpri 6
zs0a: console i/o
zs1 at obio0 addr 0xf1000000 pri 12, softpri 6
fdc0 at obio0 addr 0xf1700000 pri 11, softpri 4: chip 82077
fd0 at fdc0 drive 0: 1.44MB 80 cyl, 2 head, 18 sec
auxreg0 at obio0 addr 0xf1800000
power0 at obio0 addr 0xf1a01000
iommu0 at mainbus0 ioaddr 0xe0000000: version 0x3/0x0, page-size 4096, range 64MB
sbus0 at iommu0: clock = 20 MHz
dma0 at sbus0 slot 15 offset 0x400000: rev 2
esp0 at dma0 slot 0xf offset 0x800000 pri 4: ESP200, 40MHz, SCSI ID 7
scsibus0 at esp0: 8 targets
sd0 at scsibus0 targ 1 lun 0: <SEAGATE, ST15230N, 0298> SCSI2 0/direct fixed
sd0: 4095MB, 3992 cyl, 19 head, 110 sec, 512 bytes/sec x 8386733 sectors
sd1 at scsibus0 targ 3 lun 0: <SEAGATE, ST1480   SUN0424, 7516> SCSI2 0/direct fixed
sd1: 411MB, 1476 cyl, 9 head, 63 sec, 512 bytes/sec x 843284 sectors
ledma0 at sbus0 slot 15 offset 0x400010: rev 2
le0 at ledma0 slot 0xf offset 0xc00000 pri 6: address 08:00:20:1b:86:18
le0: 8 receive buffers, 2 transmit buffers
SUNW,bpp at sbus0 slot 15 offset 0x4800000 not configured
SUNW,DBRIe at sbus0 slot 15 offset 0x8010000 not configured
cgsix0 at sbus0 slot 2 offset 0x0: TGX120,170-0006, 1152 x 900, rev 11
root on sd0a dumps on sd0b
mountroot: trying ffs...
root file system type: ffs
init: copying out flags `-s' 3
init: copying out path `/sbin/init' 11
le0: lost carrier on AUI port, switching to UTP port

The "cpu at mainbus0 not configured" is the second cpu :-).  If I
build a kernel with "cpu* at mainbus0", the cpu lines look like: (and the
second cpu does have a floating point unit :-)

cpu0 at mainbus0: RT625/626 @ 125 MHz, on-chip FPU
cpu0: 256K write-back cache (64 bytes/line), sw flush cache enabled
cpu1 at mainbus0: RT625/626 @ 125 MHz, no FPU
cpu1: 256K write-back cache (64 bytes/line), sw flush obio0 at mainbus0

-- 
Brian Baird				Brig Systems, Pleasanton CA
brb@brig.com				+1 510 484 1342