> How far does it get before this happens? Does it print the kernel banner?
> Probe the devices? Fork init?
Booting netbsd...
NetBSD 1.2 (GENERIC....)
mem...
using 400 buffers containing 1638400 bytes of memory
bootpath:....
mainbus0 (root): SUNW,SPARCstation-10
cpu0 at mainbus0: TI, TMS390Z50 @ 36MHz, on-chip FPU
cpu0: physical cache enabledon (64 b/l), 16K data (32 b/l)
trap type 0x7: pc=f8024e24 npc=f8024e28 psr=41401fc7<EF,S,PS>
panic: alignment fault
halted

It has a SuperSPARC processor, but I am not sure about the MXCC cache
(unless you want me to disassemble everything :-)) If the lack of
MXCC is the reason, when approximately this patch will be available.

Pavlin

> 
> Does your SS10 have a SuperSPARC processor? Does it have a "MXCC" (1-MB
> level-2 "ecache")? If it is a hypersparc, it won't work. If it is a super-
> sparc without a MXCC, it also won't work under NetBSD-1.2 unless you add
> a hack to the kernel to disable the cache...[perhaps this should go into
> the first 1.2 patch...]
> 
> --Aaron
>