Subject: Re: sun4m kernel on Microsparc-II (SS5)?
To: Jonathan Stone <jonathan@dsg.stanford.edu>
From: Aaron Brown <abrown@eecs.harvard.edu>
List: port-sparc
Date: 07/09/1996 22:04:00
On Tue, 9 Jul 1996, Jonathan Stone wrote:
> 
> >I believe uSPARC-2 support is now in the 1.2 release branch.
> 
> That turns to not be completely the case. Partial MicroSPARC-II
> support, perhaps. However, sys/arch/sparc/sparc/pmap.c:pmap_enter4m()
> has the fragment
> 
> 	/* Initialise pteproto with cache bit */
> 	pteproto = (pa & PMAP_NC) == 0 ? SRMMU_PG_C : 0;
> 
> 	if (pa & PMAP_TYPE4M) {		/* this page goes in an iospace */
> 		if (cpumod == SUN4M_MS)
> 			panic("pmap_enter4m: attempt to use 36-bit iospace on"
> 			      " MicroSPARC");
> 		pteproto |= (pa & PMAP_TYPE4M) << PMAP_PTESHFT4M;
> 	}
> 
> which is precisely the panic i encountered. That doesn't look
> like MicroSPARC support to me...

Well, AFAIK, the MicroSPARC does not support 36-bit physical address 
spaces (it appears to be a supersparc peculiarity). Thus whatever's 
passing a bizarre TYPE_4M bit is in error (which doesn't refute 
your premise that microsparc support is missing, of course; I've
never had access to a microsparc-II based machine to test it, and
my understanding of the MS2 when I wrote that code was entirely from
reading (inadequate) documentation :-)

I'm sure there's someone out there that will correct me if microsparcs
do support 36-bit physical addresses. :-)

--Aaron