On Sun, 11 Feb 1996, Jason Thorpe wrote:

> On Sun, 11 Feb 1996 12:17:28 -0800 (PST) 
>  Tom Samplonius <tom@sdf.com> wrote:
> 
>  > > I just joined this mailing list and was wondering what the status of the
>  > > SPARC port is for each platform.  I am primarily interested in the
>  > > Classic/LX ports.
>  > > 
>  > > alan
>  > 
>  >   Sun 4m machines are not supported, but being worked.
> 
> Maybe Aaron can fill in some details here?

Well, the Sun4m port has been reported to work fine on the microSPARC-I 
based Classic and LX with the exception that the cache (if present) is not 
yet detected/enabled. 

For those interested, there is a source tree & kernel binary available on 
ftp://rioja.eecs.harvard.edu that corresponds to a January 31, 1996 
-current SUP. Note that the source is still in alpha release and is 
therefore not yet redistributable. I will try to merge in some of the 
massive changes that have happened since the end of January and make a 
new tar file sometime soon.

There are a bunch of things holding up integration/release:
	- A nasty interrupt bug that I've spent hours trying to fix with no
	  success
	- I'm working on revamping the CPU/cache initialization/support code
	  so that supporting the great varieties of Sun4m's is easier/cleaner
	- locore needs some cleanup so that a GENERIC kernel can be built
	- My source base should still support building SUN4 and SUN4C kernels
	  but this needs to be tested before Harvard releases the source for
	  real.

These things will come eventually once I fight off the backload of work 
I've accumulated from my courses and once I've submitted the research 
paper I'm working on. Hopefully I will soon obtain an architecture manual 
so that I can understand the interrupt register usage more thouroughly...

--Aaron

--
Aaron B. Brown
abrown@eecs.harvard.edu