Subject: Re: R10k errors (was: Re: R10k O2 won't boot)
To: Martin Husemann <email@example.com>
From: peter fuerst <firstname.lastname@example.org>
Date: 04/25/2007 22:32:46
On Mon, 23 Apr 2007, Martin Husemann wrote:
> Date: Mon, 23 Apr 2007 19:43:32 +0200
> From: Martin Husemann <email@example.com>
> To: peter fuerst <firstname.lastname@example.org>
> Cc: email@example.com
> Subject: Re: R10k errors (was: Re: R10k O2 won't boot)
> On Mon, Apr 23, 2007 at 05:14:45PM +0200, peter fuerst wrote:
> > Building the kernel with a GCC, that is specially prepared for building
> > IP28-kernels, should help on O2 too
> Could you summarize the gcc changes?
A cache-barrier will be emitted at the begin of each basic block, that
contains a critical store-instruction.
The commandline-switch also allows to enable cache-barriers before stores
also, which is, what you want, if you do not (yet) have an extended bus
error handler, that sorts out the bus errors, which are caused by
speculative accesses to invalid addresses.
The README, accompanying the patches, and the patches themselves should
give more details.
> Are you trying to merge them into gcc mainline?
I shall try another attempt (the first one being on Mar 2 2006). The last
action, so far, was http://gcc.gnu.org/ml/gcc-patches/2006-05/msg01446.html